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Searched refs:SMCR (Results 1 – 19 of 19) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_tim_ex.c206 htim->Instance->SMCR &= ~TIM_SMCR_TS; in HAL_TIMEx_HallSensor_Init()
207 htim->Instance->SMCR |= TIM_TS_TI1F_ED; in HAL_TIMEx_HallSensor_Init()
210 htim->Instance->SMCR &= ~TIM_SMCR_SMS; in HAL_TIMEx_HallSensor_Init()
211 htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; in HAL_TIMEx_HallSensor_Init()
1457 htim->Instance->SMCR &= ~TIM_SMCR_TS; in HAL_TIMEx_ConfigCommutationEvent()
1458 htim->Instance->SMCR |= InputTrigger; in HAL_TIMEx_ConfigCommutationEvent()
1506 htim->Instance->SMCR &= ~TIM_SMCR_TS; in HAL_TIMEx_ConfigCommutationEvent_IT()
1507 htim->Instance->SMCR |= InputTrigger; in HAL_TIMEx_ConfigCommutationEvent_IT()
1559 htim->Instance->SMCR &= ~TIM_SMCR_TS; in HAL_TIMEx_ConfigCommutationEvent_DMA()
1560 htim->Instance->SMCR |= InputTrigger; in HAL_TIMEx_ConfigCommutationEvent_DMA()
[all …]
Dstm32l4xx_hal_tim.c2591 htim->Instance->SMCR &= ~TIM_SMCR_SMS; in HAL_TIM_Encoder_Init()
2597 tmpsmcr = htim->Instance->SMCR; in HAL_TIM_Encoder_Init()
2624 htim->Instance->SMCR = tmpsmcr; in HAL_TIM_Encoder_Init()
3731 htim->Instance->SMCR &= ~TIM_SMCR_TS; in HAL_TIM_OnePulse_ConfigChannel()
3732 htim->Instance->SMCR |= TIM_TS_TI1FP1; in HAL_TIM_OnePulse_ConfigChannel()
3735 htim->Instance->SMCR &= ~TIM_SMCR_SMS; in HAL_TIM_OnePulse_ConfigChannel()
3736 htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; in HAL_TIM_OnePulse_ConfigChannel()
3750 htim->Instance->SMCR &= ~TIM_SMCR_TS; in HAL_TIM_OnePulse_ConfigChannel()
3751 htim->Instance->SMCR |= TIM_TS_TI2FP2; in HAL_TIM_OnePulse_ConfigChannel()
3754 htim->Instance->SMCR &= ~TIM_SMCR_SMS; in HAL_TIM_OnePulse_ConfigChannel()
[all …]
Dstm32l4xx_ll_tim.c646 tmpsmcr = LL_TIM_ReadReg(TIMx, SMCR); in LL_TIM_HALLSENSOR_Init()
678 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_hal_tim_ex.c119 htim->Instance->SMCR &= ~TIM_SMCR_MSM; in HAL_TIMEx_MasterConfigSynchronization()
121 htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; in HAL_TIMEx_MasterConfigSynchronization()
Dstm32l1xx_hal_tim.c2207 htim->Instance->SMCR &= ~TIM_SMCR_SMS; in HAL_TIM_Encoder_Init()
2213 tmpsmcr = htim->Instance->SMCR; in HAL_TIM_Encoder_Init()
2240 htim->Instance->SMCR = tmpsmcr; in HAL_TIM_Encoder_Init()
3155 htim->Instance->SMCR &= ~TIM_SMCR_TS; in HAL_TIM_OnePulse_ConfigChannel()
3156 htim->Instance->SMCR |= TIM_TS_TI1FP1; in HAL_TIM_OnePulse_ConfigChannel()
3159 htim->Instance->SMCR &= ~TIM_SMCR_SMS; in HAL_TIM_OnePulse_ConfigChannel()
3160 htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; in HAL_TIM_OnePulse_ConfigChannel()
3174 htim->Instance->SMCR &= ~TIM_SMCR_TS; in HAL_TIM_OnePulse_ConfigChannel()
3175 htim->Instance->SMCR |= TIM_TS_TI2FP2; in HAL_TIM_OnePulse_ConfigChannel()
3178 htim->Instance->SMCR &= ~TIM_SMCR_SMS; in HAL_TIM_OnePulse_ConfigChannel()
[all …]
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_hal_tim_ex.c143 htim->Instance->SMCR &= ~TIM_SMCR_MSM; in HAL_TIMEx_MasterConfigSynchronization()
145 htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; in HAL_TIMEx_MasterConfigSynchronization()
Dstm32l0xx_hal_tim.c2200 htim->Instance->SMCR &= ~TIM_SMCR_SMS; in HAL_TIM_Encoder_Init()
2206 tmpsmcr = htim->Instance->SMCR; in HAL_TIM_Encoder_Init()
2233 htim->Instance->SMCR = tmpsmcr; in HAL_TIM_Encoder_Init()
3142 htim->Instance->SMCR &= ~TIM_SMCR_TS; in HAL_TIM_OnePulse_ConfigChannel()
3143 htim->Instance->SMCR |= TIM_TS_TI1FP1; in HAL_TIM_OnePulse_ConfigChannel()
3146 htim->Instance->SMCR &= ~TIM_SMCR_SMS; in HAL_TIM_OnePulse_ConfigChannel()
3147 htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; in HAL_TIM_OnePulse_ConfigChannel()
3161 htim->Instance->SMCR &= ~TIM_SMCR_TS; in HAL_TIM_OnePulse_ConfigChannel()
3162 htim->Instance->SMCR |= TIM_TS_TI2FP2; in HAL_TIM_OnePulse_ConfigChannel()
3165 htim->Instance->SMCR &= ~TIM_SMCR_SMS; in HAL_TIM_OnePulse_ConfigChannel()
[all …]
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_tim.h2185 SET_BIT(TIMx->SMCR, TIM_SMCR_ECE); in LL_TIM_EnableExternalClock()
2198 CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE); in LL_TIM_DisableExternalClock()
2211 return (READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)); in LL_TIM_IsEnabledExternalClock()
2235 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource); in LL_TIM_SetClockSource()
2252 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode); in LL_TIM_SetEncoderMode()
2299 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode); in LL_TIM_SetSlaveMode()
2321 MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput); in LL_TIM_SetTriggerInput()
2334 SET_BIT(TIMx->SMCR, TIM_SMCR_MSM); in LL_TIM_EnableMasterSlaveMode()
2347 CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM); in LL_TIM_DisableMasterSlaveMode()
2360 return (READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)); in LL_TIM_IsEnabledMasterSlaveMode()
[all …]
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_tim.h2174 SET_BIT(TIMx->SMCR, TIM_SMCR_ECE); in LL_TIM_EnableExternalClock()
2187 CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE); in LL_TIM_DisableExternalClock()
2200 return (READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)); in LL_TIM_IsEnabledExternalClock()
2224 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource); in LL_TIM_SetClockSource()
2241 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode); in LL_TIM_SetEncoderMode()
2288 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode); in LL_TIM_SetSlaveMode()
2310 MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput); in LL_TIM_SetTriggerInput()
2323 SET_BIT(TIMx->SMCR, TIM_SMCR_MSM); in LL_TIM_EnableMasterSlaveMode()
2336 CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM); in LL_TIM_DisableMasterSlaveMode()
2349 return (READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)); in LL_TIM_IsEnabledMasterSlaveMode()
[all …]
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_tim.h3154 SET_BIT(TIMx->SMCR, TIM_SMCR_ECE); in LL_TIM_EnableExternalClock()
3167 CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE); in LL_TIM_DisableExternalClock()
3180 return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL); in LL_TIM_IsEnabledExternalClock()
3204 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource); in LL_TIM_SetClockSource()
3221 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode); in LL_TIM_SetEncoderMode()
3299 MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode); in LL_TIM_SetSlaveMode()
3321 MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput); in LL_TIM_SetTriggerInput()
3334 SET_BIT(TIMx->SMCR, TIM_SMCR_MSM); in LL_TIM_EnableMasterSlaveMode()
3347 CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM); in LL_TIM_DisableMasterSlaveMode()
3360 return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL); in LL_TIM_IsEnabledMasterSlaveMode()
[all …]
Dstm32l4xx_hal_tim.h1854 #define IS_TIM_SLAVEMODE_TRIGGER_ENABLED(__HANDLE__) ((((READ_REG((__HANDLE__)->Instance->SMCR)&TIM…
1855 …((READ_REG((__HANDLE__)->Instance->SMCR)&TIM_SMCR_SMS) == TIM_SLAVEMODE_COMBINED_RESETTRIGGER)) ? …
/loramac-node-2.7.6/src/boards/SKiM881AXL/cmsis/
Dstm32l081xx.h488 …__IO uint32_t SMCR; /*!< TIM slave Mode Control register, Address offset: 0x08 */ member
/loramac-node-2.7.6/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l072xx.h515 …__IO uint32_t SMCR; /*!< TIM slave Mode Control register, Address offset: 0x08 */ member
/loramac-node-2.7.6/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h529 …__IO uint32_t SMCR; /*!< TIM slave Mode Control register, Address offset: 0x08 */ member
/loramac-node-2.7.6/src/boards/SKiM980A/cmsis/
Dstm32l151xba.h487 __IO uint32_t SMCR; /*!< TIM slave Mode Control register, Address offset: 0x08 */ member
/loramac-node-2.7.6/src/boards/SKiM880B/cmsis/
Dstm32l151xba.h487 __IO uint32_t SMCR; /*!< TIM slave Mode Control register, Address offset: 0x08 */ member
/loramac-node-2.7.6/src/boards/NAMote72/cmsis/
Dstm32l152xc.h555 __IO uint32_t SMCR; /*!< TIM slave Mode Control register, Address offset: 0x08 */ member
/loramac-node-2.7.6/src/boards/NucleoL152/cmsis/
Dstm32l152xe.h570 __IO uint32_t SMCR; /*!< TIM slave Mode Control register, Address offset: 0x08 */ member
/loramac-node-2.7.6/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h914 __IO uint32_t SMCR; /*!< TIM slave mode control register, Address offset: 0x08 */ member