Home
last modified time | relevance | path

Searched refs:RCC_CFGR_PPRE1_DIV1 (Results 1 – 14 of 14) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_rcc.h266 #define LL_RCC_APB1_DIV_1 RCC_CFGR_PPRE1_DIV1 /*!< HCLK not divided */
Dstm32l1xx_hal_rcc.h493 #define RCC_HCLK_DIV1 RCC_CFGR_PPRE1_DIV1 /*!< HCLK not divided */
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_rcc.h306 #define LL_RCC_APB1_DIV_1 RCC_CFGR_PPRE1_DIV1 /*!< HCLK not divided */
Dstm32l0xx_hal_rcc.h503 #define RCC_HCLK_DIV1 RCC_CFGR_PPRE1_DIV1 /*!< HCLK not divided */
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_rcc.h329 #define LL_RCC_APB1_DIV_1 RCC_CFGR_PPRE1_DIV1 /*!< HCLK not divided */
Dstm32l4xx_hal_rcc.h489 #define RCC_HCLK_DIV1 RCC_CFGR_PPRE1_DIV1 /*!< HCLK not divided */
/loramac-node-2.7.6/src/boards/SKiM881AXL/cmsis/
Dstm32l081xx.h3553 #define RCC_CFGR_PPRE1_DIV1 (0x00000000U) /*!< HCLK not divide… macro
/loramac-node-2.7.6/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l072xx.h3825 #define RCC_CFGR_PPRE1_DIV1 (0x00000000U) /*!< HCLK not divide… macro
/loramac-node-2.7.6/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h3967 #define RCC_CFGR_PPRE1_DIV1 (0x00000000U) /*!< HCLK not divide… macro
/loramac-node-2.7.6/src/boards/SKiM980A/cmsis/
Dstm32l151xba.h3845 #define RCC_CFGR_PPRE1_DIV1 (0x00000000U) /*!< HCLK not divide… macro
/loramac-node-2.7.6/src/boards/SKiM880B/cmsis/
Dstm32l151xba.h3845 #define RCC_CFGR_PPRE1_DIV1 (0x00000000U) /*!< HCLK not divide… macro
/loramac-node-2.7.6/src/boards/NAMote72/cmsis/
Dstm32l152xc.h4238 #define RCC_CFGR_PPRE1_DIV1 (0x00000000U) /*!< HCLK not divide… macro
/loramac-node-2.7.6/src/boards/NucleoL152/cmsis/
Dstm32l152xe.h4308 #define RCC_CFGR_PPRE1_DIV1 (0x00000000U) /*!< HCLK not divide… macro
/loramac-node-2.7.6/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h10695 #define RCC_CFGR_PPRE1_DIV1 (0x00000000UL) /*!< HCLK not divide… macro