RCC_CFGR_HPRE_DIV128 (reference) in projects: loramac-node-2.7.6

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Searched refs:RCC_CFGR_HPRE_DIV128 (Results 1 – 14 of 14) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
D	stm32l1xx_ll_rcc.h	`256 #define LL_RCC_SYSCLK_DIV_128 RCC_CFGR_HPRE_DIV128 /!< SYSCLK divided by 128 /`
D	stm32l1xx_hal_rcc.h	`482 #define RCC_SYSCLK_DIV128 RCC_CFGR_HPRE_DIV128 /!< SYSCLK divided by 128 /`
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
D	stm32l0xx_ll_rcc.h	`296 #define LL_RCC_SYSCLK_DIV_128 RCC_CFGR_HPRE_DIV128 /!< SYSCLK divided by 128 /`
D	stm32l0xx_hal_rcc.h	`492 #define RCC_SYSCLK_DIV128 RCC_CFGR_HPRE_DIV128 /!< SYSCLK divided by 128 /`
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
D	stm32l4xx_ll_rcc.h	`319 #define LL_RCC_SYSCLK_DIV_128 RCC_CFGR_HPRE_DIV128 /!< SYSCLK divided by 128 /`
D	stm32l4xx_hal_rcc.h	`479 #define RCC_SYSCLK_DIV128 RCC_CFGR_HPRE_DIV128 /!< SYSCLK divided by 128 /`
/loramac-node-2.7.6/src/boards/SKiM881AXL/cmsis/
D	stm32l081xx.h	`3541 #define RCC_CFGR_HPRE_DIV128 (0x000000D0U) /*!< SYSCLK divided … macro`
/loramac-node-2.7.6/src/boards/B-L072Z-LRWAN1/cmsis/
D	stm32l072xx.h	`3813 #define RCC_CFGR_HPRE_DIV128 (0x000000D0U) /*!< SYSCLK divided … macro`
/loramac-node-2.7.6/src/boards/NucleoL073/cmsis/
D	stm32l073xx.h	`3955 #define RCC_CFGR_HPRE_DIV128 (0x000000D0U) /*!< SYSCLK divided … macro`
/loramac-node-2.7.6/src/boards/SKiM980A/cmsis/
D	stm32l151xba.h	`3833 #define RCC_CFGR_HPRE_DIV128 (0x000000D0U) /*!< SYSCLK divided … macro`
/loramac-node-2.7.6/src/boards/SKiM880B/cmsis/
D	stm32l151xba.h	`3833 #define RCC_CFGR_HPRE_DIV128 (0x000000D0U) /*!< SYSCLK divided … macro`
/loramac-node-2.7.6/src/boards/NAMote72/cmsis/
D	stm32l152xc.h	`4226 #define RCC_CFGR_HPRE_DIV128 (0x000000D0U) /*!< SYSCLK divided … macro`
/loramac-node-2.7.6/src/boards/NucleoL152/cmsis/
D	stm32l152xe.h	`4296 #define RCC_CFGR_HPRE_DIV128 (0x000000D0U) /*!< SYSCLK divided … macro`
/loramac-node-2.7.6/src/boards/NucleoL476/cmsis/
D	stm32l476xx.h	`10683 #define RCC_CFGR_HPRE_DIV128 (0x000000D0UL) /*!< SYSCLK divided … macro`

TraceRecorderSource-2.7.6
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Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
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babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
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