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Searched refs:PLLCFGR (Results 1 – 7 of 7) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_rcc.c111 (MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (__HAL_RCC_PLLSOURCE__)))
368 CLEAR_REG(RCC->PLLCFGR); in HAL_RCC_DeInit()
369 SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN_4 ); in HAL_RCC_DeInit()
954 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, RCC_PLLSOURCE_NONE); in HAL_RCC_OscConfig()
959 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, RCC_PLLSOURCE_NONE); in HAL_RCC_OscConfig()
962 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, RCC_PLLSOURCE_NONE); in HAL_RCC_OscConfig()
1389 pllsource = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC); in HAL_RCC_GetSysClockFreq()
1390 pllm = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; in HAL_RCC_GetSysClockFreq()
1395 … pllvco = (HSI_VALUE / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); in HAL_RCC_GetSysClockFreq()
1399 … pllvco = (HSE_VALUE / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); in HAL_RCC_GetSysClockFreq()
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Dstm32l4xx_hal_rcc_ex.c948 …PeriphClkInit->PLLSAI1.PLLSAI1Source = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC) >> RCC_PLLCFGR_P… in HAL_RCCEx_GetPeriphCLKConfig()
952 …PeriphClkInit->PLLSAI1.PLLSAI1M = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Po… in HAL_RCCEx_GetPeriphCLKConfig()
1303 if(HAL_IS_BIT_SET(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN)) in HAL_RCCEx_GetPeriphCLKFreq()
1306 … pllvco = (pllvco / ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U)); in HAL_RCCEx_GetPeriphCLKFreq()
1308 plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; in HAL_RCCEx_GetPeriphCLKFreq()
1309 …frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Pos)… in HAL_RCCEx_GetPeriphCLKFreq()
1325 … pllvco = (pllvco / ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U)); in HAL_RCCEx_GetPeriphCLKFreq()
1357 if(HAL_IS_BIT_SET(RCC->PLLCFGR, RCC_PLLCFGR_PLLPEN)) in HAL_RCCEx_GetPeriphCLKFreq()
1360 … pllvco = (pllvco / ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U)); in HAL_RCCEx_GetPeriphCLKFreq()
1362 plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; in HAL_RCCEx_GetPeriphCLKFreq()
[all …]
Dstm32l4xx_ll_rcc.c269 LL_RCC_WriteReg(PLLCFGR, 16U << RCC_PLLCFGR_PLLN_Pos); in LL_RCC_DeInit()
/loramac-node-2.7.6/src/boards/NucleoL476/cmsis/
Dsystem_stm32l4xx.c214 RCC->PLLCFGR = 0x00001000U; in SystemInit()
307 pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); in SystemCoreClockUpdate()
308 pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ; in SystemCoreClockUpdate()
324 pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U); in SystemCoreClockUpdate()
325 pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U; in SystemCoreClockUpdate()
Dstm32l476xx.h707 …__IO uint32_t PLLCFGR; /*!< RCC system PLL configuration register, … member
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_rcc.h3815 …MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PL… in LL_RCC_PLL_ConfigDomain_SYS()
3924 …MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PL… in LL_RCC_PLL_ConfigDomain_SAI()
3927 …MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PL… in LL_RCC_PLL_ConfigDomain_SAI()
3977 …MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM | RCC_PLLCFGR_PLLN | RCC_PLLCFGR_PL… in LL_RCC_PLL_ConfigDomain_48M()
3993 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, PLLSource); in LL_RCC_PLL_SetMainSource()
4007 return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC)); in LL_RCC_PLL_GetMainSource()
4017 return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos); in LL_RCC_PLL_GetN()
4060 return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV)); in LL_RCC_PLL_GetP()
4073 return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP)); in LL_RCC_PLL_GetP()
4090 return (uint32_t)(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ)); in LL_RCC_PLL_GetQ()
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Dstm32l4xx_hal_rcc.h4136 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (__PLLSOURCE__))
4150 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLM, ((__PLLM__) - 1) << 4U)
4194 … (RCC->PLLCFGR = (uint32_t)(((__PLLM__) - 1U) << 4U) | (uint32_t)((__PLLN__) << 8U) | \
4201 … (RCC->PLLCFGR = (uint32_t)(((__PLLM__) - 1U) << 4U) | (uint32_t)((__PLLN__) << 8U) | \
4208 … (RCC->PLLCFGR = (uint32_t)(((__PLLM__) - 1U) << 4U) | (uint32_t)((__PLLN__) << 8U) | \
4221 #define __HAL_RCC_GET_PLL_OSCSOURCE() (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC))
4237 #define __HAL_RCC_PLLCLKOUT_ENABLE(__PLLCLOCKOUT__) SET_BIT(RCC->PLLCFGR, (__PLLCLOCKOUT__))
4239 #define __HAL_RCC_PLLCLKOUT_DISABLE(__PLLCLOCKOUT__) CLEAR_BIT(RCC->PLLCFGR, (__PLLCLOCKOUT__))
4252 #define __HAL_RCC_GET_PLLCLKOUT_CONFIG(__PLLCLOCKOUT__) READ_BIT(RCC->PLLCFGR, (__PLLCLOCKOUT__))