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Searched refs:DFSDM1_Channel0 (Results 1 – 12 of 12) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_hal_adc_ex.h351 #if defined(ADC_CFGR_DFSDMCFG) &&defined(DFSDM1_Channel0)
393 #if defined(ADC_CFGR_DFSDMCFG) &&defined(DFSDM1_Channel0)
402 #if defined(ADC_CFGR_DFSDMCFG) &&defined(DFSDM1_Channel0)
1123 #if defined(ADC_CFGR_DFSDMCFG) &&defined(DFSDM1_Channel0)
1138 #if defined(ADC_CFGR_DFSDMCFG) &&defined(DFSDM1_Channel0)
Dstm32l4xx_hal_tim_ex.h224 #if defined (DFSDM1_Channel0)
273 #if defined (DFSDM1_Channel0)
Dstm32l4xx_ll_bus.h282 #if defined(DFSDM1_Channel0)
298 #if defined(DFSDM1_Channel0)
Dstm32l4xx_ll_rcc.h624 #if defined(DFSDM1_Channel0)
826 #if defined(DFSDM1_Channel0)
1215 #if defined(DFSDM1_Channel0)
3190 #if defined(DFSDM1_Channel0)
3551 #if defined(DFSDM1_Channel0)
6076 #if defined(DFSDM1_Channel0)
Dstm32l4xx_ll_tim.h142 #if defined(DFSDM1_Channel0)
154 #if defined(DFSDM1_Channel0)
195 #if defined(DFSDM1_Channel0)
1060 #if defined(DFSDM1_Channel0)
Dstm32l4xx_hal_adc.h198 #if defined(ADC_CFGR_DFSDMCFG) &&defined(DFSDM1_Channel0)
Dstm32l4xx_ll_adc.h866 #if defined(ADC_CFGR_DFSDMCFG) &&defined(DFSDM1_Channel0)
3728 #if defined(ADC_CFGR_DFSDMCFG) &&defined(DFSDM1_Channel0)
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_tim_ex.c1738 #if defined(DFSDM1_Channel0) in HAL_TIMEx_ConfigBreakInput()
1776 #if defined(DFSDM1_Channel0) in HAL_TIMEx_ConfigBreakInput()
1801 #if defined(DFSDM1_Channel0) in HAL_TIMEx_ConfigBreakInput()
1823 #if defined(DFSDM1_Channel0) in HAL_TIMEx_ConfigBreakInput()
Dstm32l4xx_hal_dfsdm.c411 DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC); in HAL_DFSDM_ChannelInit()
412 DFSDM1_Channel0->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection; in HAL_DFSDM_ChannelInit()
415 DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV); in HAL_DFSDM_ChannelInit()
420 DFSDM1_Channel0->CHCFGR1 |= (uint32_t)((hdfsdm_channel->Init.OutputClock.Divider - 1U) << in HAL_DFSDM_ChannelInit()
425 DFSDM1_Channel0->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN; in HAL_DFSDM_ChannelInit()
493 DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN); in HAL_DFSDM_ChannelDeInit()
3366 if (Instance == DFSDM1_Channel0) in DFSDM_GetChannelFromInstance()
Dstm32l4xx_ll_rcc.c129 #if defined(DFSDM1_Channel0)
1253 #if defined(DFSDM1_Channel0)
Dstm32l4xx_hal_adc.c437 #if defined(ADC_CFGR_DFSDMCFG) &&defined(DFSDM1_Channel0) in HAL_ADC_Init()
/loramac-node-2.7.6/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h1382 #define DFSDM1_Channel0 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel0_BASE) macro
1395 #define DFSDM_Channel0 DFSDM1_Channel0
17909 #define IS_DFSDM_CHANNEL_ALL_INSTANCE(INSTANCE) (((INSTANCE) == DFSDM1_Channel0) || \