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Searched refs:BDCR (Results 1 – 5 of 5) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_rcc.c775 MODIFY_REG(RCC->BDCR, RCC_BDCR_LSESYSDIS, (RCC_OscInitStruct->LSEState & RCC_BDCR_LSESYSDIS)); in HAL_RCC_OscConfig()
780 SET_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); in HAL_RCC_OscConfig()
781 SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); in HAL_RCC_OscConfig()
786 SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); in HAL_RCC_OscConfig()
791 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON); in HAL_RCC_OscConfig()
792 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); in HAL_RCC_OscConfig()
805 while(READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U) in HAL_RCC_OscConfig()
819 while(READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) != 0U) in HAL_RCC_OscConfig()
829 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSESYSDIS); in HAL_RCC_OscConfig()
1512 if(READ_BIT(RCC->BDCR, RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP) in HAL_RCC_GetOscConfig()
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Dstm32l4xx_hal_rcc_ex.c369 tmpregister = READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL); in HAL_RCCEx_PeriphCLKConfig()
374 tmpregister = READ_BIT(RCC->BDCR, ~(RCC_BDCR_RTCSEL)); in HAL_RCCEx_PeriphCLKConfig()
379 RCC->BDCR = tmpregister; in HAL_RCCEx_PeriphCLKConfig()
389 while(READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U) in HAL_RCCEx_PeriphCLKConfig()
1188 if(HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1453 if(HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1486 if(HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1521 if(HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1558 if(HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) in HAL_RCCEx_GetPeriphCLKFreq()
1595 if(HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)) in HAL_RCCEx_GetPeriphCLKFreq()
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/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_rcc.h2286 SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); in LL_RCC_LSE_Enable()
2296 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON); in LL_RCC_LSE_Disable()
2306 SET_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); in LL_RCC_LSE_EnableBypass()
2316 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); in LL_RCC_LSE_DisableBypass()
2332 MODIFY_REG(RCC->BDCR, RCC_BDCR_LSEDRV, LSEDrive); in LL_RCC_LSE_SetDriveCapability()
2346 return (uint32_t)(READ_BIT(RCC->BDCR, RCC_BDCR_LSEDRV)); in LL_RCC_LSE_GetDriveCapability()
2356 SET_BIT(RCC->BDCR, RCC_BDCR_LSECSSON); in LL_RCC_LSE_EnableCSS()
2368 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSECSSON); in LL_RCC_LSE_DisableCSS()
2378 return ((READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == RCC_BDCR_LSERDY) ? 1UL : 0UL); in LL_RCC_LSE_IsReady()
2388 return ((READ_BIT(RCC->BDCR, RCC_BDCR_LSECSSD) == RCC_BDCR_LSECSSD) ? 1UL : 0UL); in LL_RCC_LSE_IsCSSDetected()
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Dstm32l4xx_hal_rcc.h3783 #define __HAL_RCC_BACKUPRESET_FORCE() SET_BIT(RCC->BDCR, RCC_BDCR_BDRST)
3785 #define __HAL_RCC_BACKUPRESET_RELEASE() CLEAR_BIT(RCC->BDCR, RCC_BDCR_BDRST)
3803 #define __HAL_RCC_RTC_ENABLE() SET_BIT(RCC->BDCR, RCC_BDCR_RTCEN)
3805 #define __HAL_RCC_RTC_DISABLE() CLEAR_BIT(RCC->BDCR, RCC_BDCR_RTCEN)
4045 SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); \
4049 SET_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); \
4050 SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); \
4054 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON); \
4055 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); \
4099 MODIFY_REG( RCC->BDCR, RCC_BDCR_RTCSEL, (__RTC_CLKSOURCE__))
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/loramac-node-2.7.6/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h740 …__IO uint32_t BDCR; /*!< RCC backup domain control register, … member