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Searched refs:AHB3ENR (Results 1 – 3 of 3) sorted by relevance

/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_bus.h903 SET_BIT(RCC->AHB3ENR, Periphs); in LL_AHB3_GRP1_EnableClock()
905 tmpreg = READ_BIT(RCC->AHB3ENR, Periphs); in LL_AHB3_GRP1_EnableClock()
926 return ((READ_BIT(RCC->AHB3ENR, Periphs) == Periphs) ? 1UL : 0UL); in LL_AHB3_GRP1_IsEnabledClock()
946 CLEAR_BIT(RCC->AHB3ENR, Periphs); in LL_AHB3_GRP1_DisableClock()
Dstm32l4xx_hal_rcc.h990 SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); \
992 … tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); \
1000 SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN); \
1002 … tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN); \
1010 SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_OSPI1EN); \
1012 … tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_OSPI1EN); \
1020 SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_OSPI2EN); \
1022 … tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_OSPI2EN); \
1028 #define __HAL_RCC_FMC_CLK_DISABLE() CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN)
1032 #define __HAL_RCC_QSPI_CLK_DISABLE() CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN)
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/loramac-node-2.7.6/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h724 …__IO uint32_t AHB3ENR; /*!< RCC AHB3 peripheral clocks enable register, … member