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Searched refs:ADC (Results 1 – 25 of 26) sorted by relevance

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/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_hal_adc.c450 ADC->CCR &= (uint32_t)~ADC_CCR_LFMEN; in HAL_ADC_Init()
451 ADC->CCR |=__HAL_ADC_CCR_LOWFREQUENCY(hadc->Init.LowPowerFrequencyMode); in HAL_ADC_Init()
1674 ADC->CCR |= ADC_CCR_TSEN; in HAL_ADC_ConfigChannel()
1683 ADC->CCR |= ADC_CCR_VREFEN; in HAL_ADC_ConfigChannel()
1690 ADC->CCR |= ADC_CCR_VLCDEN; in HAL_ADC_ConfigChannel()
1705 ADC->CCR &= ~ADC_CCR_TSEN; in HAL_ADC_ConfigChannel()
1711 ADC->CCR &= ~ADC_CCR_VREFEN; in HAL_ADC_ConfigChannel()
1718 ADC->CCR &= ~ADC_CCR_VLCDEN; in HAL_ADC_ConfigChannel()
/loramac-node-2.7.6/src/boards/mcu/saml21/saml21b/include/
Dsaml21e16b.h384 #define ADC (0x43000C00) /**< \brief (ADC) APB Base Address */ macro
437 #define ADC ((Adc *)0x43000C00UL) /**< \brief (ADC) APB Base Address */ macro
439 #define ADC_INSTS { ADC } /**< \brief (ADC) Instances List */
Dsaml21e17b.h384 #define ADC (0x43000C00) /**< \brief (ADC) APB Base Address */ macro
437 #define ADC ((Adc *)0x43000C00UL) /**< \brief (ADC) APB Base Address */ macro
439 #define ADC_INSTS { ADC } /**< \brief (ADC) Instances List */
Dsaml21g17b.h384 #define ADC (0x43000C00) /**< \brief (ADC) APB Base Address */ macro
437 #define ADC ((Adc *)0x43000C00UL) /**< \brief (ADC) APB Base Address */ macro
439 #define ADC_INSTS { ADC } /**< \brief (ADC) Instances List */
Dsaml21e15b.h384 #define ADC (0x43000C00) /**< \brief (ADC) APB Base Address */ macro
437 #define ADC ((Adc *)0x43000C00UL) /**< \brief (ADC) APB Base Address */ macro
439 #define ADC_INSTS { ADC } /**< \brief (ADC) Instances List */
Dsaml21e18b.h384 #define ADC (0x43000C00) /**< \brief (ADC) APB Base Address */ macro
437 #define ADC ((Adc *)0x43000C00UL) /**< \brief (ADC) APB Base Address */ macro
439 #define ADC_INSTS { ADC } /**< \brief (ADC) Instances List */
Dsaml21g16b.h384 #define ADC (0x43000C00) /**< \brief (ADC) APB Base Address */ macro
437 #define ADC ((Adc *)0x43000C00UL) /**< \brief (ADC) APB Base Address */ macro
439 #define ADC_INSTS { ADC } /**< \brief (ADC) Instances List */
Dsaml21g18b.h384 #define ADC (0x43000C00) /**< \brief (ADC) APB Base Address */ macro
437 #define ADC ((Adc *)0x43000C00UL) /**< \brief (ADC) APB Base Address */ macro
439 #define ADC_INSTS { ADC } /**< \brief (ADC) Instances List */
Dsaml21j16b.h392 #define ADC (0x43000C00) /**< \brief (ADC) APB Base Address */ macro
447 #define ADC ((Adc *)0x43000C00UL) /**< \brief (ADC) APB Base Address */ macro
449 #define ADC_INSTS { ADC } /**< \brief (ADC) Instances List */
Dsaml21j17b.h392 #define ADC (0x43000C00) /**< \brief (ADC) APB Base Address */ macro
447 #define ADC ((Adc *)0x43000C00UL) /**< \brief (ADC) APB Base Address */ macro
449 #define ADC_INSTS { ADC } /**< \brief (ADC) Instances List */
Dsaml21j18b.h392 #define ADC (0x43000C00) /**< \brief (ADC) APB Base Address */ macro
447 #define ADC ((Adc *)0x43000C00UL) /**< \brief (ADC) APB Base Address */ macro
449 #define ADC_INSTS { ADC } /**< \brief (ADC) Instances List */
Dsaml21j18bu.h392 #define ADC (0x43000C00) /**< \brief (ADC) APB Base Address */ macro
447 #define ADC ((Adc *)0x43000C00UL) /**< \brief (ADC) APB Base Address */ macro
449 #define ADC_INSTS { ADC } /**< \brief (ADC) Instances List */
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_hal_adc.c460 MODIFY_REG(ADC->CCR , in HAL_ADC_Init()
720 CLEAR_BIT(ADC->CCR, ADC_CCR_TSVREFE); in HAL_ADC_DeInit()
1735 if (READ_BIT(ADC->CCR, ADC_CCR_TSVREFE) == RESET) in HAL_ADC_ConfigChannel()
1737 SET_BIT(ADC->CCR, ADC_CCR_TSVREFE); in HAL_ADC_ConfigChannel()
Dstm32l1xx_hal_adc_ex.c846 SET_BIT(ADC->CCR, ADC_CCR_TSVREFE); in HAL_ADCEx_InjectedConfigChannel()
Dstm32l1xx_ll_adc.c506 CLEAR_BIT(ADC->CCR, ADC_CCR_TSVREFE | ADC_CCR_ADCPRE); in LL_ADC_DeInit()
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_hal_adc.h883 ADC->CCR &= ~(ADC_CCR_PRESC); \
884 ADC->CCR |= (__HANDLE__)->Init.ClockPrescaler; \
/loramac-node-2.7.6/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_hal_adc_ex.h422 ((0x01) << ((ADC->CCR & ADC_CCR_ADCPRE) >> POSITION_VAL(ADC_CCR_ADCPRE)))
/loramac-node-2.7.6/src/boards/mcu/saml21/saml21b/include/component/
Dtal.h734 uint32_t ADC:1; /*!< bit: 12 ADC Interrupt CPU Select */ member
/loramac-node-2.7.6/
DCHANGELOG.md39 - Updated ADC driver based on en.en-st-stm32cubeide examples
/loramac-node-2.7.6/src/boards/SKiM881AXL/cmsis/
Dstm32l081xx.h657 #define ADC ADC1_COMMON macro
/loramac-node-2.7.6/src/boards/B-L072Z-LRWAN1/cmsis/
Dstm32l072xx.h747 #define ADC ADC1_COMMON macro
/loramac-node-2.7.6/src/boards/NucleoL073/cmsis/
Dstm32l073xx.h763 #define ADC ADC1_COMMON macro
/loramac-node-2.7.6/src/boards/SKiM980A/cmsis/
Dstm32l151xba.h696 #define ADC ADC1_COMMON macro
/loramac-node-2.7.6/src/boards/SKiM880B/cmsis/
Dstm32l151xba.h696 #define ADC ADC1_COMMON macro
/loramac-node-2.7.6/src/boards/NAMote72/cmsis/
Dstm32l152xc.h781 #define ADC ADC1_COMMON macro

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