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Searched refs:XSHAL_RAM_PSIZE (Results 1 – 12 of 12) sorted by relevance

/hal_xtensa-3.6.0/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dsystem.h89 #define XSHAL_RAM_PSIZE 0x00500000 macro
90 #define XSHAL_RAM_SIZE XSHAL_RAM_PSIZE
/hal_xtensa-3.6.0/zephyr/soc/nxp_imx8ulp/xtensa/config/
Dsystem.h105 #define XSHAL_RAM_PSIZE 0x21100000 macro
106 #define XSHAL_RAM_SIZE XSHAL_RAM_PSIZE
/hal_xtensa-3.6.0/zephyr/soc/mt8195_adsp/xtensa/config/
Dsystem.h89 #define XSHAL_RAM_PSIZE 0x80000000 macro
90 #define XSHAL_RAM_SIZE XSHAL_RAM_PSIZE
/hal_xtensa-3.6.0/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dsystem.h95 #define XSHAL_RAM_PSIZE 0x01000000 macro
96 #define XSHAL_RAM_SIZE XSHAL_RAM_PSIZE
/hal_xtensa-3.6.0/zephyr/soc/dc233c/xtensa/config/
Dsystem.h98 #define XSHAL_RAM_PSIZE 0x04000000 macro
99 #define XSHAL_RAM_SIZE XSHAL_RAM_PSIZE
/hal_xtensa-3.6.0/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dsystem.h105 #define XSHAL_RAM_PSIZE 0x00020000 macro
106 #define XSHAL_RAM_SIZE XSHAL_RAM_PSIZE
/hal_xtensa-3.6.0/zephyr/soc/sample_controller/xtensa/config/
Dsystem.h105 #define XSHAL_RAM_PSIZE 0x04000000 macro
106 #define XSHAL_RAM_SIZE XSHAL_RAM_PSIZE
/hal_xtensa-3.6.0/zephyr/soc/mimx8ml8/xtensa/config/
Dsystem.h105 #define XSHAL_RAM_PSIZE 0x00040000 macro
106 #define XSHAL_RAM_SIZE XSHAL_RAM_PSIZE
/hal_xtensa-3.6.0/zephyr/soc/intel_icl_adsp/xtensa/config/
Dsystem.h109 #define XSHAL_RAM_PSIZE 0x3EFE0000 macro
110 #define XSHAL_RAM_SIZE XSHAL_RAM_PSIZE
/hal_xtensa-3.6.0/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dsystem.h109 #define XSHAL_RAM_PSIZE 0x3EFE0000 macro
110 #define XSHAL_RAM_SIZE XSHAL_RAM_PSIZE
/hal_xtensa-3.6.0/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dsystem.h109 #define XSHAL_RAM_PSIZE 0x3EFE0000 macro
110 #define XSHAL_RAM_SIZE XSHAL_RAM_PSIZE
/hal_xtensa-3.6.0/zephyr/soc/intel_apl_adsp/xtensa/config/
Dsystem.h109 #define XSHAL_RAM_PSIZE 0x3EFE0000 macro
110 #define XSHAL_RAM_SIZE XSHAL_RAM_PSIZE