Searched refs:SPI_SR_BSY_Pos (Results 1 – 25 of 201) sorted by relevance
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4398 #define SPI_SR_BSY_Pos (7U) macro4399 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
4460 #define SPI_SR_BSY_Pos (7U) macro4461 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
4865 #define SPI_SR_BSY_Pos (7U) macro4866 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
5517 #define SPI_SR_BSY_Pos (7U) macro5518 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
5379 #define SPI_SR_BSY_Pos (7U) macro5380 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
5465 #define SPI_SR_BSY_Pos (7U) macro5466 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
5391 #define SPI_SR_BSY_Pos (7U) macro5392 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
3860 #define SPI_SR_BSY_Pos (7U) macro3861 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
3904 #define SPI_SR_BSY_Pos (7U) macro3905 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
3940 #define SPI_SR_BSY_Pos (7U) macro3941 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
4021 #define SPI_SR_BSY_Pos (7U) macro4022 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
4230 #define SPI_SR_BSY_Pos (7U) macro4231 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
3993 #define SPI_SR_BSY_Pos (7U) macro3994 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
4098 #define SPI_SR_BSY_Pos (7U) macro4099 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
4766 #define SPI_SR_BSY_Pos (7U) macro4767 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
4441 #define SPI_SR_BSY_Pos (7U) macro4442 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
4489 #define SPI_SR_BSY_Pos (7U) macro4490 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
4506 #define SPI_SR_BSY_Pos (7U) macro4507 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
4643 #define SPI_SR_BSY_Pos (7U) macro4644 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
4629 #define SPI_SR_BSY_Pos (7U) macro4630 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
4738 #define SPI_SR_BSY_Pos (7U) macro4739 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
4397 #define SPI_SR_BSY_Pos (7U) macro4398 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
4449 #define SPI_SR_BSY_Pos (7U) macro4450 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
5009 #define SPI_SR_BSY_Pos (7U) macro5010 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
4872 #define SPI_SR_BSY_Pos (7U) macro4873 #define SPI_SR_BSY_Msk (0x1UL << SPI_SR_BSY_Pos) /*!< 0x00000080 */
