Searched refs:LL_AHB5_GRP1_PERIPH_DMA2D (Results 1 – 5 of 5) sorted by relevance
1007 #define __HAL_RCC_DMA2D_CLK_ENABLE() LL_AHB5_GRP1_EnableClock(LL_AHB5_GRP1_PERIPH_DMA2D)1008 #define __HAL_RCC_DMA2D_CLK_DISABLE() LL_AHB5_GRP1_DisableClock(LL_AHB5_GRP1_PERIPH_DMA2D)1528 #define __HAL_RCC_DMA2D_IS_CLK_ENABLED() LL_AHB5_GRP1_IsEnabledClock(LL_AHB5_GRP1_PERIPH_DMA2D)1962 #define __HAL_RCC_DMA2D_FORCE_RESET() LL_AHB5_GRP1_ForceReset(LL_AHB5_GRP1_PERIPH_DMA2D)1963 #define __HAL_RCC_DMA2D_RELEASE_RESET() LL_AHB5_GRP1_ReleaseReset(LL_AHB5_GRP1_PERIPH_DMA2D)2513 …ne __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE() LL_AHB5_GRP1_EnableClockLowPower(LL_AHB5_GRP1_PERIPH_DMA2D)2514 …e __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE() LL_AHB5_GRP1_DisableClockLowPower(LL_AHB5_GRP1_PERIPH_DMA2D)3015 …L_RCC_DMA2D_IS_CLK_SLEEP_ENABLED() LL_AHB5_GRP1_IsEnabledClockLowPower(LL_AHB5_GRP1_PERIPH_DMA2D)
193 #define LL_AHB5_GRP1_PERIPH_DMA2D RCC_AHB5ENR_DMA2DEN macro222 #define LL_AHB5_GRP1_PERIPH_ALL (LL_AHB5_GRP1_PERIPH_DMA2D | LL_AHB5_GRP1_PERIPH_ETH1…
149 LL_AHB5_GRP1_ForceReset(LL_AHB5_GRP1_PERIPH_DMA2D); in LL_DMA2D_DeInit()152 LL_AHB5_GRP1_ReleaseReset(LL_AHB5_GRP1_PERIPH_DMA2D); in LL_DMA2D_DeInit()
138 #define LL_AHB5_GRP1_PERIPH_DMA2D RCC_AHB5ENR_DMA2DEN macro