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Searched refs:ETH_DMASBMR_WR_OSR_LMT_1 (Results 1 – 25 of 30) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_hal_eth.h1287 #define ETH_TX_OSR_LIMIT_2 ETH_DMASBMR_WR_OSR_LMT_1
1288 #define ETH_TX_OSR_LIMIT_3 (ETH_DMASBMR_WR_OSR_LMT_1 | ETH_DMASBMR_WR_OSR_LMT_0)
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_eth.c2465 …dmaconf->TxOSRLimit = READ_BIT(heth->Instance->DMASBMR, ETH_DMASBMR_WR_OSR_LMT_1 | ETH_DMASBMR_WR_… in HAL_ETH_GetDMAConfig()
/hal_stm32-latest/stm32cube/stm32mp1xx/soc/
Dstm32mp151dxx_ca7.h14711 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp151fxx_cm4.h14874 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp151axx_ca7.h14711 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp151axx_cm4.h14677 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp151dxx_cm4.h14677 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp151cxx_ca7.h14908 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp151cxx_cm4.h14874 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp151fxx_ca7.h14908 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp153axx_ca7.h16262 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp153axx_cm4.h16228 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp153cxx_ca7.h16459 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp153cxx_cm4.h16425 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp153dxx_ca7.h16262 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp153dxx_cm4.h16228 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp153fxx_ca7.h16459 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp153fxx_cm4.h16425 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp157axx_ca7.h16377 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp157axx_cm4.h16343 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp157cxx_ca7.h16574 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp157cxx_cm4.h16540 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp157dxx_ca7.h16377 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp157dxx_cm4.h16343 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro
Dstm32mp157fxx_ca7.h16574 #define ETH_DMASBMR_WR_OSR_LMT_1 (0x2UL << ETH_DMASBMR_WR_OSR_LMT_Pos) /*!< 0x0… macro

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