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Searched refs:DMA_LISR_TEIF2_Pos (Results 1 – 25 of 87) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h1618 #define DMA_LISR_TEIF2_Pos (19U) macro
1619 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f410rx.h1618 #define DMA_LISR_TEIF2_Pos (19U) macro
1619 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f410tx.h1608 #define DMA_LISR_TEIF2_Pos (19U) macro
1609 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f401xc.h1559 #define DMA_LISR_TEIF2_Pos (19U) macro
1560 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f401xe.h1559 #define DMA_LISR_TEIF2_Pos (19U) macro
1560 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f411xe.h1562 #define DMA_LISR_TEIF2_Pos (19U) macro
1563 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f405xx.h5651 #define DMA_LISR_TEIF2_Pos (19U) macro
5652 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f412cx.h5712 #define DMA_LISR_TEIF2_Pos (19U) macro
5713 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f415xx.h5833 #define DMA_LISR_TEIF2_Pos (19U) macro
5834 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f423xx.h6105 #define DMA_LISR_TEIF2_Pos (19U) macro
6106 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f407xx.h5951 #define DMA_LISR_TEIF2_Pos (19U) macro
5952 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f412zx.h5772 #define DMA_LISR_TEIF2_Pos (19U) macro
5773 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f412rx.h5766 #define DMA_LISR_TEIF2_Pos (19U) macro
5767 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f412vx.h5768 #define DMA_LISR_TEIF2_Pos (19U) macro
5769 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f413xx.h6069 #define DMA_LISR_TEIF2_Pos (19U) macro
6070 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f427xx.h6042 #define DMA_LISR_TEIF2_Pos (19U) macro
6043 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h5803 #define DMA_LISR_TEIF2_Pos (19U) macro
5804 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f205xx.h5653 #define DMA_LISR_TEIF2_Pos (19U) macro
5654 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f207xx.h5952 #define DMA_LISR_TEIF2_Pos (19U) macro
5953 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f217xx.h6102 #define DMA_LISR_TEIF2_Pos (19U) macro
6103 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h5618 #define DMA_LISR_TEIF2_Pos (19U) macro
5619 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f722xx.h5602 #define DMA_LISR_TEIF2_Pos (19U) macro
5603 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f730xx.h5832 #define DMA_LISR_TEIF2_Pos (19U) macro
5833 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f733xx.h5832 #define DMA_LISR_TEIF2_Pos (19U) macro
5833 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */
Dstm32f732xx.h5816 #define DMA_LISR_TEIF2_Pos (19U) macro
5817 #define DMA_LISR_TEIF2_Msk (0x1UL << DMA_LISR_TEIF2_Pos) /*!< 0x00080000 */

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