Searched refs:DMA_IFCR_CGIF1_Pos (Results 1 – 25 of 160) sorted by relevance
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2917 #define DMA_IFCR_CGIF1_Pos (0U) macro2918 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
2979 #define DMA_IFCR_CGIF1_Pos (0U) macro2980 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
3131 #define DMA_IFCR_CGIF1_Pos (0U) macro3132 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
2966 #define DMA_IFCR_CGIF1_Pos (0U) macro2967 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
3478 #define DMA_IFCR_CGIF1_Pos (0U) macro3479 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
3450 #define DMA_IFCR_CGIF1_Pos (0U) macro3451 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
3374 #define DMA_IFCR_CGIF1_Pos (0U) macro3375 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
1022 #define DMA_IFCR_CGIF1_Pos (0U) macro1023 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
1044 #define DMA_IFCR_CGIF1_Pos (0U) macro1045 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
1067 #define DMA_IFCR_CGIF1_Pos (0U) macro1068 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
1038 #define DMA_IFCR_CGIF1_Pos (0U) macro1039 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
1063 #define DMA_IFCR_CGIF1_Pos (0U) macro1064 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
1037 #define DMA_IFCR_CGIF1_Pos (0U) macro1038 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
1099 #define DMA_IFCR_CGIF1_Pos (0U) macro1100 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
1304 #define DMA_IFCR_CGIF1_Pos (0U) macro1305 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
1075 #define DMA_IFCR_CGIF1_Pos (0U) macro1076 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
1140 #define DMA_IFCR_CGIF1_Pos (0U) macro1141 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
1268 #define DMA_IFCR_CGIF1_Pos (0U) macro1269 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
1176 #define DMA_IFCR_CGIF1_Pos (0U) macro1177 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
1217 #define DMA_IFCR_CGIF1_Pos (0U) macro1218 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
1059 #define DMA_IFCR_CGIF1_Pos (0U) macro1060 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
1065 #define DMA_IFCR_CGIF1_Pos (0U) macro1066 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
1376 #define DMA_IFCR_CGIF1_Pos (0U) macro1377 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
1248 #define DMA_IFCR_CGIF1_Pos (0U) macro1249 #define DMA_IFCR_CGIF1_Msk (0x1UL << DMA_IFCR_CGIF1_Pos) /*!< 0x00000001 */
