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Searched refs:AHBCLKDivider (Results 1 – 25 of 80) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_ll_utils.c447 if (UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) in LL_PLL_ConfigSystemClock_MSI()
449 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_MSI()
463 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_MSI()
464 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in LL_PLL_ConfigSystemClock_MSI()
525 if (UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) in LL_PLL_ConfigSystemClock_HSI()
527 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSI()
541 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_HSI()
542 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in LL_PLL_ConfigSystemClock_HSI()
621 if (UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) in LL_PLL_ConfigSystemClock_HSE()
623 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSE()
[all …]
Dstm32l5xx_hal_rcc.c1176 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); in HAL_RCC_ClockConfig()
1178 if(RCC_ClkInitStruct->AHBCLKDivider > READ_BIT(RCC->CFGR, RCC_CFGR_HPRE)) in HAL_RCC_ClockConfig()
1180 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1288 if(RCC_ClkInitStruct->AHBCLKDivider < READ_BIT(RCC->CFGR, RCC_CFGR_HPRE)) in HAL_RCC_ClockConfig()
1290 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1707 RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_ll_utils.c527 if(UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) in LL_PLL_ConfigSystemClock_MSI()
529 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_MSI()
546 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_MSI()
547 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in LL_PLL_ConfigSystemClock_MSI()
614 if(UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) in LL_PLL_ConfigSystemClock_HSI()
616 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSI()
633 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_HSI()
634 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in LL_PLL_ConfigSystemClock_HSI()
719 if(UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) in LL_PLL_ConfigSystemClock_HSE()
721 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSE()
[all …]
Dstm32l4xx_hal_rcc.c1138 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); in HAL_RCC_ClockConfig()
1140 if(RCC_ClkInitStruct->AHBCLKDivider > READ_BIT(RCC->CFGR, RCC_CFGR_HPRE)) in HAL_RCC_ClockConfig()
1142 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1246 if(RCC_ClkInitStruct->AHBCLKDivider < READ_BIT(RCC->CFGR, RCC_CFGR_HPRE)) in HAL_RCC_ClockConfig()
1248 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1694 RCC_ClkInitStruct->AHBCLKDivider = READ_BIT(RCC->CFGR, RCC_CFGR_HPRE); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_ll_utils.c436 if (UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) in LL_PLL_ConfigSystemClock_HSI()
438 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSI()
453 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_HSI()
454 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in LL_PLL_ConfigSystemClock_HSI()
533 if (UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) in LL_PLL_ConfigSystemClock_HSE()
535 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_HSE()
550 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_HSE()
551 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in LL_PLL_ConfigSystemClock_HSE()
643 assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
648 hclk_frequency = __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
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Dstm32g4xx_hal_rcc.c822 (RCC_ClkInitStruct->AHBCLKDivider == RCC_SYSCLK_DIV1)))) in HAL_RCC_ClockConfig()
890 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); in HAL_RCC_ClockConfig()
891 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1261 RCC_ClkInitStruct->AHBCLKDivider = READ_BIT(RCC->CFGR, RCC_CFGR_HPRE); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_rcc.c1033 if ((RCC_ClkInitStruct->AHBCLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_HPRE)) in HAL_RCC_ClockConfig()
1036 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); in HAL_RCC_ClockConfig()
1037 MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1040 if ((RCC_ClkInitStruct->AHBCLKDivider) > (RCC->CDCFGR1 & RCC_CDCFGR1_HPRE)) in HAL_RCC_ClockConfig()
1043 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); in HAL_RCC_ClockConfig()
1044 MODIFY_REG(RCC->CDCFGR1, RCC_CDCFGR1_HPRE, RCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1115 if ((RCC_ClkInitStruct->AHBCLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_HPRE)) in HAL_RCC_ClockConfig()
1118 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); in HAL_RCC_ClockConfig()
1119 MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1122 if ((RCC_ClkInitStruct->AHBCLKDivider) < (RCC->CDCFGR1 & RCC_CDCFGR1_HPRE)) in HAL_RCC_ClockConfig()
[all …]
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_ll_utils.c567 if (UTILS_ClkInitStruct->AHBCLKDivider == LL_RCC_SYSCLK_DIV_1) in LL_PLL_ConfigSystemClock_MSI()
569 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_2; in LL_PLL_ConfigSystemClock_MSI()
583 UTILS_ClkInitStruct->AHBCLKDivider = LL_RCC_SYSCLK_DIV_1; in LL_PLL_ConfigSystemClock_MSI()
584 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in LL_PLL_ConfigSystemClock_MSI()
822 assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
828 hclk_frequency = __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
849 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
Dstm32u5xx_hal_rcc.c1418 if ((pRCC_ClkInitStruct->AHBCLKDivider) > (RCC->CFGR2 & RCC_CFGR2_HPRE)) in HAL_RCC_ClockConfig()
1420 assert_param(IS_RCC_HCLK(pRCC_ClkInitStruct->AHBCLKDivider)); in HAL_RCC_ClockConfig()
1421 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_HPRE, pRCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1549 if ((pRCC_ClkInitStruct->AHBCLKDivider) < (RCC->CFGR2 & RCC_CFGR2_HPRE)) in HAL_RCC_ClockConfig()
1551 assert_param(IS_RCC_HCLK(pRCC_ClkInitStruct->AHBCLKDivider)); in HAL_RCC_ClockConfig()
1552 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_HPRE, pRCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1975 pRCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR2 & RCC_CFGR2_HPRE); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc.c1098 if ((pClkInitStruct->AHBCLKDivider) > (RCC->CFGR2 & RCC_CFGR2_HPRE)) in HAL_RCC_ClockConfig()
1100 assert_param(IS_RCC_HCLK(pClkInitStruct->AHBCLKDivider)); in HAL_RCC_ClockConfig()
1101 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_HPRE, pClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1204 if ((pClkInitStruct->AHBCLKDivider) < (RCC->CFGR2 & RCC_CFGR2_HPRE)) in HAL_RCC_ClockConfig()
1206 assert_param(IS_RCC_HCLK(pClkInitStruct->AHBCLKDivider)); in HAL_RCC_ClockConfig()
1207 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_HPRE, pClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1641 pClkInitStruct->AHBCLKDivider = (uint32_t)(regval & RCC_CFGR2_HPRE); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_rcc.c961 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); in HAL_RCC_ClockConfig()
962 if ((RCC_ClkInitStruct->AHBCLKDivider) > (RCC->BMCFGR & RCC_BMCFGR_BMPRE)) in HAL_RCC_ClockConfig()
965 MODIFY_REG(RCC->BMCFGR, RCC_BMCFGR_BMPRE, RCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1031 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); in HAL_RCC_ClockConfig()
1032 if ((RCC_ClkInitStruct->AHBCLKDivider) < (RCC->BMCFGR & RCC_BMCFGR_BMPRE)) in HAL_RCC_ClockConfig()
1035 MODIFY_REG(RCC->BMCFGR, RCC_BMCFGR_BMPRE, RCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1842 RCC_ClkInitStruct->AHBCLKDivider = READ_BIT(RCC->BMCFGR, RCC_BMCFGR_BMPRE); in HAL_RCC_GetClockConfig()
Dstm32h7rsxx_ll_utils.c785 assert_param(IS_LL_UTILS_AHB_DIV(UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
793 …w_hclk_frequency = LL_RCC_CALC_HCLK_FREQ(new_sysclk_frequency, UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
824 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_rcc.c939 assert_param(IS_RCC_HCLK(pRCC_ClkInitStruct->AHBCLKDivider)); in HAL_RCC_ClockConfig()
940 if ((pRCC_ClkInitStruct->AHBCLKDivider) > (RCC->CFGR2 & RCC_CFGR2_HPRE)) in HAL_RCC_ClockConfig()
943 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_HPRE, pRCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1110 assert_param(IS_RCC_HCLK(pRCC_ClkInitStruct->AHBCLKDivider)); in HAL_RCC_ClockConfig()
1111 if ((pRCC_ClkInitStruct->AHBCLKDivider) < (RCC->CFGR2 & RCC_CFGR2_HPRE)) in HAL_RCC_ClockConfig()
1114 MODIFY_REG(RCC->CFGR2, RCC_CFGR2_HPRE, pRCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1801 pRCC_ClkInitStruct->AHBCLKDivider = (cfgr_value & RCC_CFGR2_HPRE); in HAL_RCC_GetClockConfig()
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_ll_utils.c514 assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
519 hclk_frequency = __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
539 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_ll_utils.c556 assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
562 hclk_frequency = __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
583 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_ll_utils.c512 assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
537 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
559 …_SetSystemCoreClock(__LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_ll_utils.c521 assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
526 hclk_frequency = __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
546 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_ll_utils.c512 assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
516 hclk_frequency = __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
537 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_ll_utils.c555 assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
579 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
600 …_SetSystemCoreClock(__LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_ll_utils.c632 assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
636 hclk_frequency = __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
657 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_ll_utils.c576 assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
581 hclk_frequency = __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
601 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_ll_utils.c688 assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
693 hclk_frequency = __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
713 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_ll_utils.c686 assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
691 hclk_frequency = __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
711 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_ll_utils.c687 assert_param(IS_LL_UTILS_SYSCLK_DIV(UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
727 LL_RCC_SetAHBPrescaler(UTILS_ClkInitStruct->AHBCLKDivider); in UTILS_EnablePLLAndSwitchSystem()
751 …_SetSystemCoreClock(__LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, UTILS_ClkInitStruct->AHBCLKDivider)); in UTILS_EnablePLLAndSwitchSystem()
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/src/
Dstm32c0xx_hal_rcc.c684 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); in HAL_RCC_ClockConfig()
685 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); in HAL_RCC_ClockConfig()
1094 RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); in HAL_RCC_GetClockConfig()

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