DMA_CTR2_TCEM_Pos (reference) in projects: hal_stm32-3.7.0

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Searched refs:DMA_CTR2_TCEM_Pos (Results 1 – 25 of 26) sorted by relevance

/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/
D	stm32wba50xx.h	`2329 #define DMA_CTR2_TCEM_Pos (30U) macro 2330 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 2332 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 2333 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32wba52xx.h	`2913 #define DMA_CTR2_TCEM_Pos (30U) macro 2914 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 2916 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 2917 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32wba54xx.h	`3096 #define DMA_CTR2_TCEM_Pos (30U) macro 3097 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 3099 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 3100 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32wba55xx.h	`3096 #define DMA_CTR2_TCEM_Pos (30U) macro 3097 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 3099 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 3100 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
/hal_stm32-3.7.0/stm32cube/stm32h5xx/soc/
D	stm32h503xx.h	`3934 #define DMA_CTR2_TCEM_Pos (30U) macro 3935 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 3937 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 3938 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32h523xx.h	`5298 #define DMA_CTR2_TCEM_Pos (30U) macro 5299 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 5301 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 5302 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32h562xx.h	`5719 #define DMA_CTR2_TCEM_Pos (30U) macro 5720 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 5722 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 5723 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32h533xx.h	`5706 #define DMA_CTR2_TCEM_Pos (30U) macro 5707 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 5709 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 5710 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32h563xx.h	`7803 #define DMA_CTR2_TCEM_Pos (30U) macro 7804 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 7806 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 7807 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32h573xx.h	`8211 #define DMA_CTR2_TCEM_Pos (30U) macro 8212 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 8214 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 8215 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
/hal_stm32-3.7.0/stm32cube/stm32h7rsxx/soc/
D	stm32h7r3xx.h	`5089 #define DMA_CTR2_TCEM_Pos (30U) macro 5090 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 5092 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 5093 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32h7s3xx.h	`5534 #define DMA_CTR2_TCEM_Pos (30U) macro 5535 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 5537 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 5538 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32h7s7xx.h	`5613 #define DMA_CTR2_TCEM_Pos (30U) macro 5614 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 5616 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 5617 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32h7r7xx.h	`5166 #define DMA_CTR2_TCEM_Pos (30U) macro 5167 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 5169 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 5170 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
/hal_stm32-3.7.0/stm32cube/stm32u5xx/soc/
D	stm32u535xx.h	`5979 #define DMA_CTR2_TCEM_Pos (30U) macro 5980 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 5982 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 5983 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32u545xx.h	`6379 #define DMA_CTR2_TCEM_Pos (30U) macro 6380 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 6382 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 6383 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32u575xx.h	`6377 #define DMA_CTR2_TCEM_Pos (30U) macro 6378 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 6380 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 6381 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32u585xx.h	`6826 #define DMA_CTR2_TCEM_Pos (30U) macro 6827 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 6829 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 6830 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32u5f7xx.h	`6929 #define DMA_CTR2_TCEM_Pos (30U) macro 6930 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 6932 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 6933 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32u595xx.h	`6633 #define DMA_CTR2_TCEM_Pos (30U) macro 6634 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 6636 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 6637 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32u5a5xx.h	`7082 #define DMA_CTR2_TCEM_Pos (30U) macro 7083 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 7085 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 7086 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32u599xx.h	`6921 #define DMA_CTR2_TCEM_Pos (30U) macro 6922 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 6924 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 6925 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32u5g7xx.h	`7378 #define DMA_CTR2_TCEM_Pos (30U) macro 7379 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 7381 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 7382 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32u5g9xx.h	`7498 #define DMA_CTR2_TCEM_Pos (30U) macro 7499 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 7501 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 7502 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`
D	stm32u5f9xx.h	`7049 #define DMA_CTR2_TCEM_Pos (30U) macro 7050 #define DMA_CTR2_TCEM_Msk (0x3UL << DMA_CTR2_TCEM_Pos) /!< 0xC0000000… 7052 #define DMA_CTR2_TCEM_0 (0x1UL << DMA_CTR2_TCEM_Pos) /!< Bit 0 / 7053 #define DMA_CTR2_TCEM_1 (0x2UL << DMA_CTR2_TCEM_Pos) /!< Bit 1 */`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
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Zephyr-Core-3.5.0
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