Home
last modified time | relevance | path

Searched refs:GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos (Results 1 – 16 of 16) sorted by relevance

/hal_stm32-3.5.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h11417 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos (0U) macro
11418 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Msk (0x01UL << GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos) /*!< 0x000…
Dstm32h562xx.h18021 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos (0U) macro
18022 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Msk (0x01UL << GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos) /*!< 0x000…
Dstm32h563xx.h20153 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos (0U) macro
20154 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Msk (0x01UL << GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos) /*!< 0x000…
Dstm32h573xx.h20778 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos (0U) macro
20779 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Msk (0x01UL << GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos) /*!< 0x000…
/hal_stm32-3.5.0/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h19326 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos (0U) macro
19327 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Msk (0x01UL << GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos) /*!< 0x000…
Dstm32u535xx.h18730 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos (0U) macro
18731 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Msk (0x01UL << GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos) /*!< 0x000…
Dstm32u575xx.h20421 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos (0U) macro
20422 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Msk (0x01UL << GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos) /*!< 0x000…
Dstm32u5a5xx.h22338 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos (0U) macro
22339 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Msk (0x01UL << GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos) /*!< 0x000…
Dstm32u585xx.h21083 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos (0U) macro
21084 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Msk (0x01UL << GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos) /*!< 0x000…
Dstm32u5f7xx.h23357 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos (0U) macro
23358 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Msk (0x01UL << GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos) /*!< 0x000…
Dstm32u595xx.h21676 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos (0U) macro
21677 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Msk (0x01UL << GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos) /*!< 0x000…
Dstm32u599xx.h25510 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos (0U) macro
25511 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Msk (0x01UL << GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos) /*!< 0x000…
Dstm32u5g7xx.h24019 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos (0U) macro
24020 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Msk (0x01UL << GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos) /*!< 0x000…
Dstm32u5a9xx.h26172 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos (0U) macro
26173 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Msk (0x01UL << GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos) /*!< 0x000…
Dstm32u5g9xx.h27172 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos (0U) macro
27173 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Msk (0x01UL << GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos) /*!< 0x000…
Dstm32u5f9xx.h26510 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos (0U) macro
26511 #define GTZC_MPCBB_CFGLOCKR1_SPLCK0_Msk (0x01UL << GTZC_MPCBB_CFGLOCKR1_SPLCK0_Pos) /*!< 0x000…