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Searched refs:_PRS_CH_CTRL_SOURCESEL_ACMP2 (Results 1 – 25 of 64) sorted by relevance

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/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_prs.h1085 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
1125 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b390f1024gl112.h7413 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
7452 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b390f512gl112.h7413 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
7452 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b530f512il120.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b530f512im64.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b530f512iq100.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b530f512iq64.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b530f512gq100.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b530f512gq64.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b530f512il112.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b110f1024gm64.h8190 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8229 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b110f1024gq64.h8190 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8229 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b530f512gl112.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b530f512gl120.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b530f512gm64.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b510f1024gq100.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b510f1024gq64.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b510f1024gl112.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b510f1024gl120.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b510f1024gm64.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b510f1024il112.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b510f1024il120.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b510f1024im64.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
Defm32gg12b510f1024iq100.h8221 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
8260 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_prs.h1459 #define _PRS_CH_CTRL_SOURCESEL_ACMP2 0x0000001CUL /… macro
1506 #define PRS_CH_CTRL_SOURCESEL_ACMP2 (_PRS_CH_CTRL_SOURCESEL_ACMP2 << 8) /…

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