Home
last modified time | relevance | path

Searched refs:_PRS_CH_CTRL_SOURCESEL_ACMP0 (Results 1 – 25 of 125) sorted by relevance

12345

/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg_prs.h270 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL /**< Mode ACM… macro
284 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) /**< Shifted …
Defm32hg210f32.h1735 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL /**< Mode ACM… macro
1748 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) /**< Shifted …
Defm32hg210f64.h1735 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL /**< Mode ACM… macro
1748 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) /**< Shifted …
Defm32hg222f32.h1735 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL /**< Mode ACM… macro
1748 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) /**< Shifted …
Defm32hg222f64.h1735 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL /**< Mode ACM… macro
1748 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) /**< Shifted …
Defm32hg110f32.h1735 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL /**< Mode ACM… macro
1748 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) /**< Shifted …
Defm32hg110f64.h1735 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL /**< Mode ACM… macro
1748 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) /**< Shifted …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32WG/Include/
Defm32wg_prs.h393 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL /**< Mo… macro
417 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) /**< Sh…
Defm32wg280f128.h1978 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL /**< Mo… macro
2001 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) /**< Sh…
Defm32wg280f256.h1978 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL /**< Mo… macro
2001 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) /**< Sh…
Defm32wg280f64.h1978 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL /**< Mo… macro
2001 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) /**< Sh…
Defm32wg290f128.h1978 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL /**< Mo… macro
2001 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) /**< Sh…
Defm32wg290f256.h1978 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL /**< Mo… macro
2001 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) /**< Sh…
Defm32wg290f64.h1978 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL /**< Mo… macro
2001 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) /**< Sh…
Defm32wg295f128.h1978 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL /**< Mo… macro
2001 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) /**< Sh…
Defm32wg295f256.h1978 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL /**< Mo… macro
2001 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) /**< Sh…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_prs.h889 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000006UL /**< Mode… macro
907 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 8) /**< Shif…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_prs.h889 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000006UL /**< Mode… macro
907 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 8) /**< Shif…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_prs.h973 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000003UL /… macro
999 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 8) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_prs.h973 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000003UL /… macro
999 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 8) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_prs.h1001 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000003UL /… macro
1030 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 8) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_prs.h1001 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000003UL /… macro
1030 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 8) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_prs.h1001 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000003UL /… macro
1030 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 8) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_prs.h1066 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000004UL /… macro
1106 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 8) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_prs.h1440 #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000004UL /… macro
1487 #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 8) /…

12345