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Searched refs:ROMAPI_ULPSS_CLK_API (Results 1 – 2 of 2) sorted by relevance

/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/rom_driver/inc/
Drsi_rom_ulpss_clk.h105 return ROMAPI_ULPSS_CLK_API->ulpss_clock_config(pCLK, clkEnable, divFactor, oddDivFactor); in RSI_ULPSS_ClockConfig()
172 return ROMAPI_ULPSS_CLK_API->ulpss_ulp_peri_clk_enable(pULPCLK, u32Flags); in RSI_ULPSS_UlpPeriClkEnable()
215 return ROMAPI_ULPSS_CLK_API->ulpss_ulp_peri_clk_disable(pULPCLK, u32Flags); in RSI_ULPSS_UlpPeriClkDisable()
257 return ROMAPI_ULPSS_CLK_API->ulpss_ulp_dyn_clk_enable(pULPCLK, u32Flags); in RSI_ULPSS_UlpDynClkEnable()
299 return ROMAPI_ULPSS_CLK_API->ulpss_ulp_dyn_clk_disable(pULPCLK, u32Flags); in RSI_ULPSS_UlpDynClkDisable()
334 return ROMAPI_ULPSS_CLK_API->ulpss_ulp_ssi_clk_config(pULPCLK, clkType, clkSource, divFactor); in RSI_ULPSS_UlpSsiClkConfig()
368 return ROMAPI_ULPSS_CLK_API->ulpss_ulp_i2s_clk_config(pULPCLK, clkSource, divFactor); in RSI_ULPSS_UlpI2sClkConfig()
406 …return ROMAPI_ULPSS_CLK_API->ulpss_ulp_uar_clk_config(pULPCLK, clkType, bFrClkSel, clkSource, divF… in RSI_ULPSS_UlpUartClkConfig()
446 …return ROMAPI_ULPSS_CLK_API->ulpss_time_clk_config(pULPCLK, clkType, bTmrSync, clkSource, skipSwit… in RSI_ULPSS_TimerClkConfig()
461 return ROMAPI_ULPSS_CLK_API->ulpss_time_clk_disable(pULPCLK); in RSI_ULPSS_TimerClkDisable()
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Drsi_rom_table_si91x.h1063 #define ROMAPI_ULPSS_CLK_API ((RSI_ROM_API)->pULPSSCLK) macro