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Searched refs:_CSEN_CTRL_SARCR_CLK10 (Results 1 – 8 of 8) sorted by relevance

/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_csen.h118 #define _CSEN_CTRL_SARCR_CLK10 0x00000000UL … macro
123 #define CSEN_CTRL_SARCR_CLK10 (_CSEN_CTRL_SARCR_CLK10 << 8) …
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_csen.h118 #define _CSEN_CTRL_SARCR_CLK10 0x00000000UL … macro
123 #define CSEN_CTRL_SARCR_CLK10 (_CSEN_CTRL_SARCR_CLK10 << 8) …
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_csen.h118 #define _CSEN_CTRL_SARCR_CLK10 0x00000000UL … macro
123 #define CSEN_CTRL_SARCR_CLK10 (_CSEN_CTRL_SARCR_CLK10 << 8) …
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_csen.h118 #define _CSEN_CTRL_SARCR_CLK10 0x00000000UL … macro
123 #define CSEN_CTRL_SARCR_CLK10 (_CSEN_CTRL_SARCR_CLK10 << 8) …
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_csen.h118 #define _CSEN_CTRL_SARCR_CLK10 0x00000000UL … macro
123 #define CSEN_CTRL_SARCR_CLK10 (_CSEN_CTRL_SARCR_CLK10 << 8) …
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_csen.h118 #define _CSEN_CTRL_SARCR_CLK10 0x00000000UL … macro
123 #define CSEN_CTRL_SARCR_CLK10 (_CSEN_CTRL_SARCR_CLK10 << 8) …
/hal_silabs-3.7.0/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_csen.h118 #define _CSEN_CTRL_SARCR_CLK10 0x00000000UL … macro
123 #define CSEN_CTRL_SARCR_CLK10 (_CSEN_CTRL_SARCR_CLK10 << 8) …
/hal_silabs-3.7.0/gecko/emlib/inc/
Dem_csen.h149 csenSARRes10 = _CSEN_CTRL_SARCR_CLK10, /**< 10-bit resolution. */