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Searched refs:BUS_RegMaskedWrite (Results 1 – 11 of 11) sorted by relevance

/hal_silabs-3.5.0/gecko/emlib/src/
Dem_gpio.c126 BUS_RegMaskedWrite(&GPIO->P[port].CTRL, in GPIO_DriveStrengthSet()
199 BUS_RegMaskedWrite(&GPIO->EXTIPSELL, in GPIO_ExtIntConfig()
207 BUS_RegMaskedWrite(&GPIO->EXTIPSELH, in GPIO_ExtIntConfig()
212 BUS_RegMaskedWrite(&GPIO->EXTIPSELH, in GPIO_ExtIntConfig()
227 BUS_RegMaskedWrite(&GPIO->EXTIPINSELL, in GPIO_ExtIntConfig()
234 BUS_RegMaskedWrite(&GPIO->EXTIPINSELH, in GPIO_ExtIntConfig()
241 BUS_RegMaskedWrite(&GPIO->EXTIPINSELH, in GPIO_ExtIntConfig()
Dem_acmp.c264 BUS_RegMaskedWrite(&acmp->INPUTCTRL, _ACMP_INPUTCTRL_POSSEL_MASK, in ACMP_CapsenseChannelSet()
268 BUS_RegMaskedWrite(&acmp->INPUTSEL, _ACMP_INPUTSEL_POSSEL_MASK, in ACMP_CapsenseChannelSet()
465 BUS_RegMaskedWrite(&acmp->CTRL, _ACMP_CTRL_GPIOINV_MASK, in ACMP_GPIOSetup()
582 BUS_RegMaskedWrite(&acmp->INPUTCTRL, _ACMP_INPUTCTRL_VREFDIV_MASK, in ACMP_Init()
646 BUS_RegMaskedWrite(&acmp->INPUTSEL, _ACMP_INPUTSEL_VASEL_MASK, in ACMP_VASetup()
648 BUS_RegMaskedWrite(&acmp->HYSTERESIS0, _ACMP_HYSTERESIS0_DIVVA_MASK, in ACMP_VASetup()
650 BUS_RegMaskedWrite(&acmp->HYSTERESIS1, _ACMP_HYSTERESIS1_DIVVA_MASK, in ACMP_VASetup()
672 BUS_RegMaskedWrite(&acmp->INPUTSEL, _ACMP_INPUTSEL_VBSEL_MASK, in ACMP_VBSetup()
674 BUS_RegMaskedWrite(&acmp->HYSTERESIS0, _ACMP_HYSTERESIS0_DIVVB_MASK, in ACMP_VBSetup()
676 BUS_RegMaskedWrite(&acmp->HYSTERESIS1, _ACMP_HYSTERESIS1_DIVVB_MASK, in ACMP_VBSetup()
Dem_lcd.c950 BUS_RegMaskedWrite(segmentRegister, 0xF << bitShift, biasLevel << bitShift); in LCD_BiasSegmentSet()
1004 BUS_RegMaskedWrite(comRegister, 0xF << bitShift, biasLevel << bitShift); in LCD_BiasComSet()
1011 BUS_RegMaskedWrite(&(LCD->SEGD4L), 0xF << bitShift, biasLevel << bitShift); in LCD_BiasComSet()
Dem_msc.c1922 BUS_RegMaskedWrite(&SYSCFG->DMEM0PORTMAPSEL, in MSC_DmemPortMapSet()
1955 BUS_RegMaskedWrite(&DMEM->CTRL, in MSC_PortSetPriority()
Dem_cmu.c2862 BUS_RegMaskedWrite(&HFXO0->BUFOUTTRIM, in CMU_HFXOInit()
2875 BUS_RegMaskedWrite(&HFXO0->LOWPWRCTRL, in CMU_HFXOInit()
2901 BUS_RegMaskedWrite((volatile uint32_t*)(HFXO0_BASE + 0x38U), in CMU_HFXOInit()
2979 BUS_RegMaskedWrite((volatile uint32_t *)(HFXO0_BASE + 0x34U), in CMU_HFXOInit()
3043 BUS_RegMaskedWrite(&HFXO0->BUFOUTCTRL, in CMU_HFXOStartCrystalSharingLeader()
3117 BUS_RegMaskedWrite(&HFXO0->CTRL, mask, value); in CMU_HFXOCrystalSharingFollowerInit()
3133 BUS_RegMaskedWrite(&(PRS->ASYNC_CH[prsAsyncCh].CTRL), mask, value); in CMU_HFXOCrystalSharingFollowerInit()
10697 BUS_RegMaskedWrite(&CMU->CTRL, in CMU_LFXOInit()
Dem_i2c.c281 BUS_RegMaskedWrite(&i2c->CTRL, in I2C_BusFreqSet()
Dem_can.c587 BUS_RegMaskedWrite(&can->STATUS, _CAN_STATUS_LEC_MASK, 0x7); in CAN_SendMessage()
Dem_adc.c414 BUS_RegMaskedWrite(&adc->CTRL, in ADC_Init()
Dem_emu.c3275 BUS_RegMaskedWrite(&DCDC->BSTEM01CTRL, in EMU_EM01BoostPeakCurrentSet()
3486 BUS_RegMaskedWrite(&DCDC->EM01CTRL0, in EMU_EM01PeakCurrentSet()
/hal_silabs-3.5.0/gecko/emlib/inc/
Dem_bus.h299 __STATIC_INLINE void BUS_RegMaskedWrite(volatile uint32_t *addr, in BUS_RegMaskedWrite() function
Dem_gpio.h830 BUS_RegMaskedWrite(&(GPIO->INSENSE), mask, val); in GPIO_InputSenseSet()