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Searched refs:SSI_SPI_CTRLR0_ADDR_L_LSB (Results 1 – 9 of 9) sorted by relevance

/hal_rpi_pico-latest/src/rp2040/boot_stage2/
Dboot2_w25x10cl.S124 (7 << SSI_SPI_CTRLR0_ADDR_L_LSB) | /* Send 28 bits (24 address + 4 mode) */ \
173 (7 << SSI_SPI_CTRLR0_ADDR_L_LSB) | /* Send 28 bits (24 address + 4 mode) */ \
Dboot2_is25lp080.S191 (ADDR_L << SSI_SPI_CTRLR0_ADDR_L_LSB) | /* Address + mode bits */ \
234 (ADDR_L << SSI_SPI_CTRLR0_ADDR_L_LSB) | /* Total number of address + mode bits */ \
Dboot2_generic_03h.S50 (ADDR_L << SSI_SPI_CTRLR0_ADDR_L_LSB) | /* Total number of address + mode bits */ \
Dboot2_at25sf128a.S215 (ADDR_L << SSI_SPI_CTRLR0_ADDR_L_LSB) | /* Address + mode bits */ \
252 (ADDR_L << SSI_SPI_CTRLR0_ADDR_L_LSB) | /* Total number of address + mode bits */ \
Dboot2_w25q080.S217 (ADDR_L << SSI_SPI_CTRLR0_ADDR_L_LSB) | /* Address + mode bits */ \
254 (ADDR_L << SSI_SPI_CTRLR0_ADDR_L_LSB) | /* Total number of address + mode bits */ \
/hal_rpi_pico-latest/src/rp2350/boot_stage2/
Dboot2_w25x10cl.S120 (7 << SSI_SPI_CTRLR0_ADDR_L_LSB) | /* Send 28 bits (24 address + 4 mode) */ \
169 (7 << SSI_SPI_CTRLR0_ADDR_L_LSB) | /* Send 28 bits (24 address + 4 mode) */ \
Dboot2_is25lp080.S187 (ADDR_L << SSI_SPI_CTRLR0_ADDR_L_LSB) | /* Address + mode bits */ \
230 (ADDR_L << SSI_SPI_CTRLR0_ADDR_L_LSB) | /* Total number of address + mode bits */ \
Dboot2_at25sf128a.S211 (ADDR_L << SSI_SPI_CTRLR0_ADDR_L_LSB) | /* Address + mode bits */ \
248 (ADDR_L << SSI_SPI_CTRLR0_ADDR_L_LSB) | /* Total number of address + mode bits */ \
/hal_rpi_pico-latest/src/rp2040/hardware_regs/include/hardware/regs/
Dssi.h776 #define SSI_SPI_CTRLR0_ADDR_L_LSB _u(2) macro