Searched refs:setting_value (Results 1 – 1 of 1) sorted by relevance
174 uint32_t setting_value = 0; in bsp_clock_freq_init_cfg() local177 setting_value = (uint32_t) (BSP_CFG_DIVPL1_SET_DIV << R_CPG_CPG_PL1_DDIV_DIVPL1_SET_Pos); in bsp_clock_freq_init_cfg()180 …_t) (R_CPG_CPG_PL1_DDIV_DIV_PLL1SET_WEN_Msk | (R_CPG_CPG_PL1_DDIV_DIVPL1_SET_Msk & setting_value)); in bsp_clock_freq_init_cfg()184 setting_value = (uint32_t) (BSP_CFG_DIVPL2B_SET_DIV << R_CPG_CPG_PL2_DDIV_DIVPL2B_SET_Pos); in bsp_clock_freq_init_cfg()187 …_t) (R_CPG_CPG_PL2_DDIV_DIV_PLL2_B_WEN_Msk | (R_CPG_CPG_PL2_DDIV_DIVPL2B_SET_Msk & setting_value)); in bsp_clock_freq_init_cfg()191 setting_value = (uint32_t) ((BSP_CFG_DIVPL3A_SET_DIV << R_CPG_CPG_PL3_DDIV_DIVPL3A_SET_Pos) | in bsp_clock_freq_init_cfg()203 setting_value)); in bsp_clock_freq_init_cfg()210 setting_value = (uint32_t) ((BSP_CFG_DIVPL6A_SET_DIV << R_CPG_CPG_PL6_DDIV_DIVPL6A_SET_Pos) | in bsp_clock_freq_init_cfg()218 setting_value)); in bsp_clock_freq_init_cfg()224 setting_value = (uint32_t) ((BSP_CFG_DIVSDHI0_SET_DIV << R_CPG_CPG_SDHI_DDIV_DIVSDHI0_SET_Pos) | in bsp_clock_freq_init_cfg()[all …]
