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Searched refs:__IOM (Results 1 – 25 of 44) sorted by relevance

12

/hal_renesas-latest/drivers/ra/fsp/src/r_sce/crypto_procedures/src/rsip7/plainkey/private/inc/
DSCE_ProcCommon.h27 __IOM uint32_t REG_00H;
30 __IOM uint32_t B0 : 1;
31 __IOM uint32_t B1 : 1;
32 __IOM uint32_t B2 : 1;
33 __IOM uint32_t B3 : 1;
34 __IOM uint32_t B4 : 1;
35 __IOM uint32_t B5 : 1;
36 __IOM uint32_t B6 : 1;
37 __IOM uint32_t B7 : 1;
38 __IOM uint32_t B8 : 1;
[all …]
/hal_renesas-latest/drivers/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/private/inc/
DSCE_ProcCommon.h25 __IOM uint32_t REG_00H;
27 __IOM uint32_t B0:1;
28 __IOM uint32_t B1:1;
29 __IOM uint32_t B2:1;
30 __IOM uint32_t B3:1;
31 __IOM uint32_t B4:1;
32 __IOM uint32_t B5:1;
33 __IOM uint32_t B6:1;
34 __IOM uint32_t B7:1;
35 __IOM uint32_t B8:1;
[all …]
/hal_renesas-latest/drivers/ra/fsp/src/r_sce/
DSCE_ProcCommon.h26 __IOM uint32_t REG_00H;
29 __IOM uint32_t B0 : 1;
30 __IOM uint32_t B1 : 1;
31 __IOM uint32_t B2 : 1;
32 __IOM uint32_t B3 : 1;
33 __IOM uint32_t B4 : 1;
34 __IOM uint32_t B5 : 1;
35 __IOM uint32_t B6 : 1;
36 __IOM uint32_t B7 : 1;
37 __IOM uint32_t B8 : 1;
[all …]
/hal_renesas-latest/drivers/rz/fsp/src/rzg/bsp/cmsis/Device/RENESAS/Include/R9A08G045S/iodefines/
Dgpio_iodefine.h28 __IOM uint8_t P_20;
31 __IOM uint8_t P0 : 1;
32 __IOM uint8_t P1 : 1;
33 __IOM uint8_t P2 : 1;
34 __IOM uint8_t P3 : 1;
40 __IOM uint8_t P_21;
43 __IOM uint8_t P0 : 1;
44 __IOM uint8_t P1 : 1;
45 __IOM uint8_t P2 : 1;
46 __IOM uint8_t P3 : 1;
[all …]
Dintc_im33_iodefine.h28 __IOM uint32_t NSCR;
31 __IOM uint32_t NSTAT : 1;
39 __IOM uint32_t NITSR;
42 __IOM uint32_t NTSEL : 1;
49 __IOM uint32_t ISCR;
52 __IOM uint32_t ISTAT0 : 1;
53 __IOM uint32_t ISTAT1 : 1;
54 __IOM uint32_t ISTAT2 : 1;
55 __IOM uint32_t ISTAT3 : 1;
56 __IOM uint32_t ISTAT4 : 1;
[all …]
Dgpt_iodefine.h28 __IOM uint32_t GTWP;
31 __IOM uint32_t WP : 1;
33 __IOM uint32_t PRKEY : 8;
40 __IOM uint32_t GTSTR;
43 __IOM uint32_t CSTRT0 : 1;
44 __IOM uint32_t CSTRT1 : 1;
45 __IOM uint32_t CSTRT2 : 1;
46 __IOM uint32_t CSTRT3 : 1;
47 __IOM uint32_t CSTRT4 : 1;
48 __IOM uint32_t CSTRT5 : 1;
[all …]
Dcpg_iodefine.h28 __IOM uint32_t CPG_PLL1_STBY;
31 __IOM uint32_t RESETB : 1;
33 __IOM uint32_t SSCG_EN : 1;
35 __IOM uint32_t SSCG_MODE : 1;
37 __IOM uint32_t RESETB_WEN : 1;
39 __IOM uint32_t SSCG_EN_WEN : 1;
41 __IOM uint32_t SSCG_MODE_WEN : 1;
47 __IOM uint32_t CPG_PLL1_CLK1;
50 __IOM uint32_t RANGESEL : 1;
51 __IOM uint32_t DIV_NF : 12;
[all …]
Dsysc_iodefine.h27 __IOM uint32_t SYS_MSTACCCTL0;
30 __IOM uint32_t DMAC0_AWPU : 1;
31 __IOM uint32_t DMAC0_AWNS : 1;
33 __IOM uint32_t DMAC0_AWSEL : 1;
34 __IOM uint32_t DMAC0_ARPU : 1;
35 __IOM uint32_t DMAC0_ARNS : 1;
37 __IOM uint32_t DMAC0_ARSEL : 1;
51 __IOM uint32_t SYS_MSTACCCTL1;
54 __IOM uint32_t SDHI0_AWPU : 1;
55 __IOM uint32_t SDHI0_AWNS : 1;
[all …]
/hal_renesas-latest/drivers/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
DR7FA4M3AF.h60 …#ifndef __IOM /*!< Fallback for older CMSIS versions …
61 #define __IOM __IO macro
108__IOM uint16_t MOD; /*!< (@ 0x00000002) Mode Register …
112__IOM uint16_t WRMOD : 1; /*!< [0..0] Write Access Mode Select …
114__IOM uint16_t EWENB : 1; /*!< [3..3] External Wait Enable …
116__IOM uint16_t PRENB : 1; /*!< [8..8] Page Read Access Enable …
117__IOM uint16_t PWENB : 1; /*!< [9..9] Page Write Access Enable …
119__IOM uint16_t PRMOD : 1; /*!< [15..15] Page Read Access Mode Select …
125__IOM uint32_t WCR1; /*!< (@ 0x00000004) Wait Control Register 1 …
129__IOM uint32_t CSPWWAIT : 3; /*!< [2..0] Page Write Cycle Wait Select …
[all …]
DR7FA4M2AD.h60 …#ifndef __IOM /*!< Fallback for older CMSIS versions …
61 #define __IOM __IO macro
108__IOM uint16_t MOD; /*!< (@ 0x00000002) Mode Register …
112__IOM uint16_t WRMOD : 1; /*!< [0..0] Write Access Mode Select …
114__IOM uint16_t EWENB : 1; /*!< [3..3] External Wait Enable …
116__IOM uint16_t PRENB : 1; /*!< [8..8] Page Read Access Enable …
117__IOM uint16_t PWENB : 1; /*!< [9..9] Page Write Access Enable …
119__IOM uint16_t PRMOD : 1; /*!< [15..15] Page Read Access Mode Select …
125__IOM uint32_t WCR1; /*!< (@ 0x00000004) Wait Control Register 1 …
129__IOM uint32_t CSPWWAIT : 3; /*!< [2..0] Page Write Cycle Wait Select …
[all …]
DR7FA4E2B9.h60 …#ifndef __IOM /*!< Fallback for older CMSIS versions …
61 #define __IOM __IO macro
108__IOM uint16_t MOD; /*!< (@ 0x00000002) Mode Register …
112__IOM uint16_t WRMOD : 1; /*!< [0..0] Write Access Mode Select …
114__IOM uint16_t EWENB : 1; /*!< [3..3] External Wait Enable …
116__IOM uint16_t PRENB : 1; /*!< [8..8] Page Read Access Enable …
117__IOM uint16_t PWENB : 1; /*!< [9..9] Page Write Access Enable …
119__IOM uint16_t PRMOD : 1; /*!< [15..15] Page Read Access Mode Select …
125__IOM uint32_t WCR1; /*!< (@ 0x00000004) Wait Control Register 1 …
129__IOM uint32_t CSPWWAIT : 3; /*!< [2..0] Page Write Cycle Wait Select …
[all …]
DR7FA2L1AB.h58 …#ifndef __IOM /*!< Fallback for older CMSIS versions …
59 #define __IOM __IO macro
106__IOM uint16_t MOD; /*!< (@ 0x00000002) Mode Register …
110__IOM uint16_t WRMOD : 1; /*!< [0..0] Write Access Mode Select …
112__IOM uint16_t EWENB : 1; /*!< [3..3] External Wait Enable …
114__IOM uint16_t PRENB : 1; /*!< [8..8] Page Read Access Enable …
115__IOM uint16_t PWENB : 1; /*!< [9..9] Page Write Access Enable …
117__IOM uint16_t PRMOD : 1; /*!< [15..15] Page Read Access Mode Select …
123__IOM uint32_t WCR1; /*!< (@ 0x00000004) Wait Control Register 1 …
127__IOM uint32_t CSPWWAIT : 3; /*!< [2..0] Page Write Cycle Wait Select …
[all …]
DR7FA4M1AB.h57 …#ifndef __IOM /*!< Fallback for older CMSIS versions …
58 #define __IOM __IO macro
105__IOM uint16_t MOD; /*!< (@ 0x00000002) Mode Register …
109__IOM uint16_t WRMOD : 1; /*!< [0..0] Write Access Mode Select …
111__IOM uint16_t EWENB : 1; /*!< [3..3] External Wait Enable …
113__IOM uint16_t PRENB : 1; /*!< [8..8] Page Read Access Enable …
114__IOM uint16_t PWENB : 1; /*!< [9..9] Page Write Access Enable …
116__IOM uint16_t PRMOD : 1; /*!< [15..15] Page Read Access Mode Select …
122__IOM uint32_t WCR1; /*!< (@ 0x00000004) Wait Control Register 1 …
126__IOM uint32_t CSPWWAIT : 3; /*!< [2..0] Page Write Cycle Wait Select …
[all …]
DR7FA6M1AD.h57 …#ifndef __IOM /*!< Fallback for older CMSIS versions …
58 #define __IOM __IO macro
105__IOM uint16_t MOD; /*!< (@ 0x00000002) Mode Register …
109__IOM uint16_t WRMOD : 1; /*!< [0..0] Write Access Mode Select …
111__IOM uint16_t EWENB : 1; /*!< [3..3] External Wait Enable …
113__IOM uint16_t PRENB : 1; /*!< [8..8] Page Read Access Enable …
114__IOM uint16_t PWENB : 1; /*!< [9..9] Page Write Access Enable …
116__IOM uint16_t PRMOD : 1; /*!< [15..15] Page Read Access Mode Select …
122__IOM uint32_t WCR1; /*!< (@ 0x00000004) Wait Control Register 1 …
126__IOM uint32_t CSPWWAIT : 3; /*!< [2..0] Page Write Cycle Wait Select …
[all …]
DR7FA6M4AF.h60 …#ifndef __IOM /*!< Fallback for older CMSIS versions …
61 #define __IOM __IO macro
108__IOM uint16_t MOD; /*!< (@ 0x00000002) Mode Register …
112__IOM uint16_t WRMOD : 1; /*!< [0..0] Write Access Mode Select …
114__IOM uint16_t EWENB : 1; /*!< [3..3] External Wait Enable …
116__IOM uint16_t PRENB : 1; /*!< [8..8] Page Read Access Enable …
117__IOM uint16_t PWENB : 1; /*!< [9..9] Page Write Access Enable …
119__IOM uint16_t PRMOD : 1; /*!< [15..15] Page Read Access Mode Select …
125__IOM uint32_t WCR1; /*!< (@ 0x00000004) Wait Control Register 1 …
129__IOM uint32_t CSPWWAIT : 3; /*!< [2..0] Page Write Cycle Wait Select …
[all …]
DR7FA4W1AD.h57 …#ifndef __IOM /*!< Fallback for older CMSIS versions …
58 #define __IOM __IO macro
105__IOM uint16_t MOD; /*!< (@ 0x00000002) Mode Register …
109__IOM uint16_t WRMOD : 1; /*!< [0..0] Write Access Mode Select …
111__IOM uint16_t EWENB : 1; /*!< [3..3] External Wait Enable …
113__IOM uint16_t PRENB : 1; /*!< [8..8] Page Read Access Enable …
114__IOM uint16_t PWENB : 1; /*!< [9..9] Page Write Access Enable …
116__IOM uint16_t PRMOD : 1; /*!< [15..15] Page Read Access Mode Select …
122__IOM uint32_t WCR1; /*!< (@ 0x00000004) Wait Control Register 1 …
126__IOM uint32_t CSPWWAIT : 3; /*!< [2..0] Page Write Cycle Wait Select …
[all …]
DR7FA2A1AB.h58 …#ifndef __IOM /*!< Fallback for older CMSIS versions …
59 #define __IOM __IO macro
106__IOM uint16_t MOD; /*!< (@ 0x00000002) Mode Register …
110__IOM uint16_t WRMOD : 1; /*!< [0..0] Write Access Mode Select …
112__IOM uint16_t EWENB : 1; /*!< [3..3] External Wait Enable …
114__IOM uint16_t PRENB : 1; /*!< [8..8] Page Read Access Enable …
115__IOM uint16_t PWENB : 1; /*!< [9..9] Page Write Access Enable …
117__IOM uint16_t PRMOD : 1; /*!< [15..15] Page Read Access Mode Select …
123__IOM uint32_t WCR1; /*!< (@ 0x00000004) Wait Control Register 1 …
127__IOM uint32_t CSPWWAIT : 3; /*!< [2..0] Page Write Cycle Wait Select …
[all …]
DR7FA4E10D.h60 …#ifndef __IOM /*!< Fallback for older CMSIS versions …
61 #define __IOM __IO macro
108__IOM uint16_t MOD; /*!< (@ 0x00000002) Mode Register …
112__IOM uint16_t WRMOD : 1; /*!< [0..0] Write Access Mode Select …
114__IOM uint16_t EWENB : 1; /*!< [3..3] External Wait Enable …
116__IOM uint16_t PRENB : 1; /*!< [8..8] Page Read Access Enable …
117__IOM uint16_t PWENB : 1; /*!< [9..9] Page Write Access Enable …
119__IOM uint16_t PRMOD : 1; /*!< [15..15] Page Read Access Mode Select …
125__IOM uint32_t WCR1; /*!< (@ 0x00000004) Wait Control Register 1 …
129__IOM uint32_t CSPWWAIT : 3; /*!< [2..0] Page Write Cycle Wait Select …
[all …]
DR7FA6E10F.h60 …#ifndef __IOM /*!< Fallback for older CMSIS versions …
61 #define __IOM __IO macro
108__IOM uint16_t MOD; /*!< (@ 0x00000002) Mode Register …
112__IOM uint16_t WRMOD : 1; /*!< [0..0] Write Access Mode Select …
114__IOM uint16_t EWENB : 1; /*!< [3..3] External Wait Enable …
116__IOM uint16_t PRENB : 1; /*!< [8..8] Page Read Access Enable …
117__IOM uint16_t PWENB : 1; /*!< [9..9] Page Write Access Enable …
119__IOM uint16_t PRMOD : 1; /*!< [15..15] Page Read Access Mode Select …
125__IOM uint32_t WCR1; /*!< (@ 0x00000004) Wait Control Register 1 …
129__IOM uint32_t CSPWWAIT : 3; /*!< [2..0] Page Write Cycle Wait Select …
[all …]
DR7FA8D1BH.h64 …#ifndef __IOM /*!< Fallback for older CMSIS versions …
65 #define __IOM __IO macro
112__IOM uint16_t MOD; /*!< (@ 0x00000002) Mode Register …
116__IOM uint16_t WRMOD : 1; /*!< [0..0] Write Access Mode Select …
118__IOM uint16_t EWENB : 1; /*!< [3..3] External Wait Enable …
120__IOM uint16_t PRENB : 1; /*!< [8..8] Page Read Access Enable …
121__IOM uint16_t PWENB : 1; /*!< [9..9] Page Write Access Enable …
123__IOM uint16_t PRMOD : 1; /*!< [15..15] Page Read Access Mode Select …
129__IOM uint32_t WCR1; /*!< (@ 0x00000004) Wait Control Register 1 …
133__IOM uint32_t CSPWWAIT : 3; /*!< [2..0] Page Write Cycle Wait Select …
[all …]
DR7FA6M5BH.h60 …#ifndef __IOM /*!< Fallback for older CMSIS versions …
61 #define __IOM __IO macro
108__IOM uint16_t MOD; /*!< (@ 0x00000002) Mode Register …
112__IOM uint16_t WRMOD : 1; /*!< [0..0] Write Access Mode Select …
114__IOM uint16_t EWENB : 1; /*!< [3..3] External Wait Enable …
116__IOM uint16_t PRENB : 1; /*!< [8..8] Page Read Access Enable …
117__IOM uint16_t PWENB : 1; /*!< [9..9] Page Write Access Enable …
119__IOM uint16_t PRMOD : 1; /*!< [15..15] Page Read Access Mode Select …
125__IOM uint32_t WCR1; /*!< (@ 0x00000004) Wait Control Register 1 …
129__IOM uint32_t CSPWWAIT : 3; /*!< [2..0] Page Write Cycle Wait Select …
[all …]
DR7FA8M1AH.h64 …#ifndef __IOM /*!< Fallback for older CMSIS versions …
65 #define __IOM __IO macro
112__IOM uint16_t MOD; /*!< (@ 0x00000002) Mode Register …
116__IOM uint16_t WRMOD : 1; /*!< [0..0] Write Access Mode Select …
118__IOM uint16_t EWENB : 1; /*!< [3..3] External Wait Enable …
120__IOM uint16_t PRENB : 1; /*!< [8..8] Page Read Access Enable …
121__IOM uint16_t PWENB : 1; /*!< [9..9] Page Write Access Enable …
123__IOM uint16_t PRMOD : 1; /*!< [15..15] Page Read Access Mode Select …
129__IOM uint32_t WCR1; /*!< (@ 0x00000004) Wait Control Register 1 …
133__IOM uint32_t CSPWWAIT : 3; /*!< [2..0] Page Write Cycle Wait Select …
[all …]
DR7FA6M3AH.h57 …#ifndef __IOM /*!< Fallback for older CMSIS versions …
58 #define __IOM __IO macro
105__IOM uint16_t MOD; /*!< (@ 0x00000002) Mode Register …
109__IOM uint16_t WRMOD : 1; /*!< [0..0] Write Access Mode Select …
111__IOM uint16_t EWENB : 1; /*!< [3..3] External Wait Enable …
113__IOM uint16_t PRENB : 1; /*!< [8..8] Page Read Access Enable …
114__IOM uint16_t PWENB : 1; /*!< [9..9] Page Write Access Enable …
116__IOM uint16_t PRMOD : 1; /*!< [15..15] Page Read Access Mode Select …
122__IOM uint32_t WCR1; /*!< (@ 0x00000004) Wait Control Register 1 …
126__IOM uint32_t CSPWWAIT : 3; /*!< [2..0] Page Write Cycle Wait Select …
[all …]
DR7FA6M2AF.h57 …#ifndef __IOM /*!< Fallback for older CMSIS versions …
58 #define __IOM __IO macro
105__IOM uint16_t MOD; /*!< (@ 0x00000002) Mode Register …
109__IOM uint16_t WRMOD : 1; /*!< [0..0] Write Access Mode Select …
111__IOM uint16_t EWENB : 1; /*!< [3..3] External Wait Enable …
113__IOM uint16_t PRENB : 1; /*!< [8..8] Page Read Access Enable …
114__IOM uint16_t PWENB : 1; /*!< [9..9] Page Write Access Enable …
116__IOM uint16_t PRMOD : 1; /*!< [15..15] Page Read Access Mode Select …
122__IOM uint32_t WCR1; /*!< (@ 0x00000004) Wait Control Register 1 …
126__IOM uint32_t CSPWWAIT : 3; /*!< [2..0] Page Write Cycle Wait Select …
[all …]
DR7FA6E2BB.h60 …#ifndef __IOM /*!< Fallback for older CMSIS versions …
61 #define __IOM __IO macro
108__IOM uint16_t MOD; /*!< (@ 0x00000002) Mode Register …
112__IOM uint16_t WRMOD : 1; /*!< [0..0] Write Access Mode Select …
114__IOM uint16_t EWENB : 1; /*!< [3..3] External Wait Enable …
116__IOM uint16_t PRENB : 1; /*!< [8..8] Page Read Access Enable …
117__IOM uint16_t PWENB : 1; /*!< [9..9] Page Write Access Enable …
119__IOM uint16_t PRMOD : 1; /*!< [15..15] Page Read Access Mode Select …
125__IOM uint32_t WCR1; /*!< (@ 0x00000004) Wait Control Register 1 …
129__IOM uint32_t CSPWWAIT : 3; /*!< [2..0] Page Write Cycle Wait Select …
[all …]

12