Home
last modified time | relevance | path

Searched refs:TPM_SC_CPWMS_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_tpm.c176 base->SC &= ~TPM_SC_CPWMS_MASK; in TPM_SetupPwm()
180 base->SC |= TPM_SC_CPWMS_MASK; in TPM_SetupPwm()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h19363 #define TPM_SC_CPWMS_MASK (0x20U) macro
19369 … (((uint32_t)(((uint32_t)(x)) << TPM_SC_CPWMS_SHIFT)) & TPM_SC_CPWMS_MASK)
DRV32M1_zero_riscy.h20191 #define TPM_SC_CPWMS_MASK (0x20U) macro
20197 … (((uint32_t)(((uint32_t)(x)) << TPM_SC_CPWMS_SHIFT)) & TPM_SC_CPWMS_MASK)