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Searched refs:SCG_SOSCCSR_SOSCSEL_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_clock.c364 if (reg & SCG_SOSCCSR_SOSCSEL_MASK) in CLOCK_DeinitSysOsc()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h16724 #define SCG_SOSCCSR_SOSCSEL_MASK (0x2000000U) macro
16730 … (((uint32_t)(((uint32_t)(x)) << SCG_SOSCCSR_SOSCSEL_SHIFT)) & SCG_SOSCCSR_SOSCSEL_MASK)
DRV32M1_zero_riscy.h17552 #define SCG_SOSCCSR_SOSCSEL_MASK (0x2000000U) macro
17558 … (((uint32_t)(((uint32_t)(x)) << SCG_SOSCCSR_SOSCSEL_SHIFT)) & SCG_SOSCCSR_SOSCSEL_MASK)