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Searched refs:MISC2 (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_sim.h134 SIM->MISC2 &= ~SIM_MISC2_SYSTICK_CLK_EN_MASK; /* Clear to enable. */ in SIM_EnableSystickClock()
138 SIM->MISC2 |= SIM_MISC2_SYSTICK_CLK_EN_MASK; /* Set to disable. */ in SIM_EnableSystickClock()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h17810 __IO uint32_t MISC2; /**< MISC2 Register, offset: 0x70 */ member
DRV32M1_zero_riscy.h18638 __IO uint32_t MISC2; /**< MISC2 Register, offset: 0x70 */ member