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Searched refs:SIM_UIDMH_UID95_64_MASK (Results 1 – 25 of 27) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K116_SIM.h386 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
389 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
DS32K118_SIM.h386 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
389 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
DS32K142W_SIM.h477 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
480 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
DS32K142_SIM.h457 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
460 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
DS32K144W_SIM.h477 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
480 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
DS32K144_SIM.h457 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
460 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
DS32K146_SIM.h502 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
505 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
DS32K148_SIM.h537 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
540 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h10632 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
10636 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h10634 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
10638 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM14ZA5/
DMKM14ZA5.h10322 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
10326 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h11471 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
11475 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h13273 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
13277 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h13247 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
13250 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h13279 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
13283 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h13276 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
13280 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h13508 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
13512 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/
DMKE17Z9.h13251 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
13254 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h13511 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
13515 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h13249 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
13252 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h16828 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
16832 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM33ZA5/
DMKM33ZA5.h15027 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
15031 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h17834 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
17838 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h17828 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
17832 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM34ZA5/
DMKM34ZA5.h15023 #define SIM_UIDMH_UID95_64_MASK (0xFFFFFFFFU) macro
15027 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDMH_UID95_64_SHIFT)) & SIM_UIDMH_UID95_64_MASK)

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