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Searched refs:SCG_LPFLLCSR_LPFLLSEL_MASK (Results 1 – 25 of 25) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/drivers/
Dfsl_clock.c844 if ((reg & SCG_LPFLLCSR_LPFLLSEL_MASK) != 0UL) in CLOCK_DeinitLpFll()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/drivers/
Dfsl_clock.c780 if ((reg & SCG_LPFLLCSR_LPFLLSEL_MASK) != 0UL) in CLOCK_DeinitLpFll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/drivers/
Dfsl_clock.c824 if ((reg & SCG_LPFLLCSR_LPFLLSEL_MASK) != 0UL) in CLOCK_DeinitLpFll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/drivers/
Dfsl_clock.c840 if ((reg & SCG_LPFLLCSR_LPFLLSEL_MASK) != 0UL) in CLOCK_DeinitLpFll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/drivers/
Dfsl_clock.c844 if ((reg & SCG_LPFLLCSR_LPFLLSEL_MASK) != 0UL) in CLOCK_DeinitLpFll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/drivers/
Dfsl_clock.c840 if ((reg & SCG_LPFLLCSR_LPFLLSEL_MASK) != 0UL) in CLOCK_DeinitLpFll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/drivers/
Dfsl_clock.c844 if ((reg & SCG_LPFLLCSR_LPFLLSEL_MASK) != 0UL) in CLOCK_DeinitLpFll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/drivers/
Dfsl_clock.c824 if ((reg & SCG_LPFLLCSR_LPFLLSEL_MASK) != 0UL) in CLOCK_DeinitLpFll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/drivers/
Dfsl_clock.c824 if ((reg & SCG_LPFLLCSR_LPFLLSEL_MASK) != 0UL) in CLOCK_DeinitLpFll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/drivers/
Dfsl_clock.c846 if ((reg & SCG_LPFLLCSR_LPFLLSEL_MASK) != 0UL) in CLOCK_DeinitLpFll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/drivers/
Dfsl_clock.c892 if ((reg & SCG_LPFLLCSR_LPFLLSEL_MASK) != 0UL) in CLOCK_DeinitLpFll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/drivers/
Dfsl_clock.c892 if ((reg & SCG_LPFLLCSR_LPFLLSEL_MASK) != 0UL) in CLOCK_DeinitLpFll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h10265 #define SCG_LPFLLCSR_LPFLLSEL_MASK (0x2000000U) macro
10271 … (((uint32_t)(((uint32_t)(x)) << SCG_LPFLLCSR_LPFLLSEL_SHIFT)) & SCG_LPFLLCSR_LPFLLSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h10267 #define SCG_LPFLLCSR_LPFLLSEL_MASK (0x2000000U) macro
10273 … (((uint32_t)(((uint32_t)(x)) << SCG_LPFLLCSR_LPFLLSEL_SHIFT)) & SCG_LPFLLCSR_LPFLLSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h11104 #define SCG_LPFLLCSR_LPFLLSEL_MASK (0x2000000U) macro
11110 … (((uint32_t)(((uint32_t)(x)) << SCG_LPFLLCSR_LPFLLSEL_SHIFT)) & SCG_LPFLLCSR_LPFLLSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h12834 #define SCG_LPFLLCSR_LPFLLSEL_MASK (0x2000000U) macro
12840 … (((uint32_t)(((uint32_t)(x)) << SCG_LPFLLCSR_LPFLLSEL_SHIFT)) & SCG_LPFLLCSR_LPFLLSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h12801 #define SCG_LPFLLCSR_LPFLLSEL_MASK (0x2000000U) macro
12807 … (((uint32_t)(((uint32_t)(x)) << SCG_LPFLLCSR_LPFLLSEL_SHIFT)) & SCG_LPFLLCSR_LPFLLSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h12840 #define SCG_LPFLLCSR_LPFLLSEL_MASK (0x2000000U) macro
12846 … (((uint32_t)(((uint32_t)(x)) << SCG_LPFLLCSR_LPFLLSEL_SHIFT)) & SCG_LPFLLCSR_LPFLLSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h12837 #define SCG_LPFLLCSR_LPFLLSEL_MASK (0x2000000U) macro
12843 … (((uint32_t)(((uint32_t)(x)) << SCG_LPFLLCSR_LPFLLSEL_SHIFT)) & SCG_LPFLLCSR_LPFLLSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h13045 #define SCG_LPFLLCSR_LPFLLSEL_MASK (0x2000000U) macro
13051 … (((uint32_t)(((uint32_t)(x)) << SCG_LPFLLCSR_LPFLLSEL_SHIFT)) & SCG_LPFLLCSR_LPFLLSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/
DMKE17Z9.h12805 #define SCG_LPFLLCSR_LPFLLSEL_MASK (0x2000000U) macro
12811 … (((uint32_t)(((uint32_t)(x)) << SCG_LPFLLCSR_LPFLLSEL_SHIFT)) & SCG_LPFLLCSR_LPFLLSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h13048 #define SCG_LPFLLCSR_LPFLLSEL_MASK (0x2000000U) macro
13054 … (((uint32_t)(((uint32_t)(x)) << SCG_LPFLLCSR_LPFLLSEL_SHIFT)) & SCG_LPFLLCSR_LPFLLSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h12803 #define SCG_LPFLLCSR_LPFLLSEL_MASK (0x2000000U) macro
12809 … (((uint32_t)(((uint32_t)(x)) << SCG_LPFLLCSR_LPFLLSEL_SHIFT)) & SCG_LPFLLCSR_LPFLLSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h18069 #define SCG_LPFLLCSR_LPFLLSEL_MASK (0x2000000U) macro
18075 … (((uint32_t)(((uint32_t)(x)) << SCG_LPFLLCSR_LPFLLSEL_SHIFT)) & SCG_LPFLLCSR_LPFLLSEL_MASK)
DK32L3A60_cm0plus.h18179 #define SCG_LPFLLCSR_LPFLLSEL_MASK (0x2000000U) macro
18185 … (((uint32_t)(((uint32_t)(x)) << SCG_LPFLLCSR_LPFLLSEL_SHIFT)) & SCG_LPFLLCSR_LPFLLSEL_MASK)