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Searched refs:RESC_GROUP_PRAMS_START (Results 1 – 8 of 8) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT533S/
Dfsl_pm_device.c150 [kResc_SRAM_FLEXSPI0 - RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_FLEXSPI0_SRAM_APD_MASK,
152 [kResc_SRAM_FLEXSPI1 - RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_FLEXSPI1_SRAM_APD_MASK,
155 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_USBHS_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_USBHS_SRAM…
157 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_USDHC0_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_USDHC0_SR…
159 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_USDHC1_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_USDHC1_SR…
161 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_GPU_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_GPU_SRAM_PPD…
162 [kResc_SRAM_SMARTDMA - RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_SMARTDMA_SRAM_APD_MASK,
164 [kResc_SRAM_MIPIDSI - RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_MIPIDSI_SRAM_APD_MASK,
167 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_LCDIF_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_LCDIF_SRAM…
249 for (resc = RESC_GROUP_PRAMS_START; resc <= RESC_GROUP_PRAMS_END; resc++) in PM_DEV_EnablePeripheralsDeepSleep()
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Dfsl_pm_device.h130 #define RESC_GROUP_PRAMS_START kResc_SRAM_FLEXSPI0 macro
132 #define RESC_GROUP_PRAMS_SIZE RESC_GROUP_PRAMS_END - RESC_GROUP_PRAMS_START + 1
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT555S/
Dfsl_pm_device.c150 [kResc_SRAM_FLEXSPI0 - RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_FLEXSPI0_SRAM_APD_MASK,
152 [kResc_SRAM_FLEXSPI1 - RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_FLEXSPI1_SRAM_APD_MASK,
155 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_USBHS_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_USBHS_SRAM…
157 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_USDHC0_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_USDHC0_SR…
159 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_USDHC1_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_USDHC1_SR…
161 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_GPU_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_GPU_SRAM_PPD…
162 [kResc_SRAM_SMARTDMA - RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_SMARTDMA_SRAM_APD_MASK,
164 [kResc_SRAM_MIPIDSI - RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_MIPIDSI_SRAM_APD_MASK,
167 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_LCDIF_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_LCDIF_SRAM…
249 for (resc = RESC_GROUP_PRAMS_START; resc <= RESC_GROUP_PRAMS_END; resc++) in PM_DEV_EnablePeripheralsDeepSleep()
[all …]
Dfsl_pm_device.h130 #define RESC_GROUP_PRAMS_START kResc_SRAM_FLEXSPI0 macro
132 #define RESC_GROUP_PRAMS_SIZE RESC_GROUP_PRAMS_END - RESC_GROUP_PRAMS_START + 1
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT595S/
Dfsl_pm_device.c150 [kResc_SRAM_FLEXSPI0 - RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_FLEXSPI0_SRAM_APD_MASK,
152 [kResc_SRAM_FLEXSPI1 - RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_FLEXSPI1_SRAM_APD_MASK,
155 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_USBHS_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_USBHS_SRAM…
157 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_USDHC0_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_USDHC0_SR…
159 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_USDHC1_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_USDHC1_SR…
161 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_GPU_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_GPU_SRAM_PPD…
162 [kResc_SRAM_SMARTDMA - RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_SMARTDMA_SRAM_APD_MASK,
164 [kResc_SRAM_MIPIDSI - RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_MIPIDSI_SRAM_APD_MASK,
167 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_LCDIF_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_LCDIF_SRAM…
249 for (resc = RESC_GROUP_PRAMS_START; resc <= RESC_GROUP_PRAMS_END; resc++) in PM_DEV_EnablePeripheralsDeepSleep()
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Dfsl_pm_device.h130 #define RESC_GROUP_PRAMS_START kResc_SRAM_FLEXSPI0 macro
132 #define RESC_GROUP_PRAMS_SIZE RESC_GROUP_PRAMS_END - RESC_GROUP_PRAMS_START + 1
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT685S/
Dfsl_pm_device.c160 [kResc_SRAM_PQ - RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_PQ_SRAM_APD_MASK,
162 [kResc_SRAM_FLEXSPI - RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_FLEXSPI_SRAM_APD_MASK,
165 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_USBHS_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_USBHS_SRAM…
167 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_USDHC0_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_USDHC0_SR…
169 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_USDHC1_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_USDHC1_SR…
171 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_CASPER_SRAM_APD_MASK, SYSCTL0_PDSLEEPCFG1_CASPER_SR…
172 [kResc_SRAM_DSPCACHE - RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_DSPCACHE_REGF_APD_MASK,
175 …RESC_GROUP_PRAMS_START] = {SYSCTL0_PDSLEEPCFG1_DSPTCM_REGF_APD_MASK, SYSCTL0_PDSLEEPCFG1_DSPTCM_RE…
222 for (resc = RESC_GROUP_PRAMS_START; resc <= RESC_GROUP_PRAMS_END; resc++) in PM_DEV_EnablePeripheralsDeepSleep()
226 feature = resc - RESC_GROUP_PRAMS_START; in PM_DEV_EnablePeripheralsDeepSleep()
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Dfsl_pm_device.h118 #define RESC_GROUP_PRAMS_START kResc_SRAM_PQ macro
120 #define RESC_GROUP_PRAMS_SIZE RESC_GROUP_PRAMS_END - RESC_GROUP_PRAMS_START + 1