SW_PAD_CTL_GRP_DDRPK (reference) in projects: hal_nxp-3.7.0

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/hal_nxp-3.7.0/imx/devices/MCIMX6X/
D	MCIMX6X_M4.h	`16013 …__IO uint32_t SW_PAD_CTL_GRP_DDRPK; /**< Pad Group Control Register, offset: 0x… member 16562 #define IOMUXC_SW_PAD_CTL_GRP_DDRPK_REG(base) ((base)->SW_PAD_CTL_GRP_DDRPK)`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
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