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Searched refs:MMC_RX_INTERRUPT_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.6.0/s32/drivers/s32k3/Eth_GMAC/src/
DGmac_Ip.c687 Base->MMC_RX_INTERRUPT_MASK = 0x03FFFFFFU; in Gmac_Ip_InitMAC()
/hal_nxp-3.6.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_EMAC.h152 __IO uint32_t MMC_RX_INTERRUPT_MASK; /**< MMC Receive Interrupt Mask, offset: 0x70C */ member