Home
last modified time | relevance | path

Searched refs:ICSR (Results 1 – 25 of 29) sorted by relevance

12

/hal_nxp-3.6.0/mcux/mcux-sdk/CMSIS/RTOS2/RTX/Source/
Drtx_core_cm.h186 return ((uint8_t)((SCB->ICSR & (SCB_ICSR_PENDSVSET_Msk)) >> 24)); in GetPendSV()
191 SCB->ICSR = SCB_ICSR_PENDSVCLR_Msk; in ClrPendSV()
196 SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; in SetPendSV()
/hal_nxp-3.6.0/s32/drivers/s32k1/BaseNXP/header/
DS32K116_SCB.h80 …__IO uint32_t ICSR; /**< Interrupt Control and State Register, offset… member
DS32K118_SCB.h80 …__IO uint32_t ICSR; /**< Interrupt Control and State Register, offset… member
DS32K142W_SCB.h80 …__IO uint32_t ICSR; /**< Interrupt Control and State Register, offset… member
DS32K144_SCB.h80 …__IO uint32_t ICSR; /**< Interrupt Control and State Register, offset… member
DS32K144W_SCB.h80 …__IO uint32_t ICSR; /**< Interrupt Control and State Register, offset… member
DS32K142_SCB.h80 …__IO uint32_t ICSR; /**< Interrupt Control and State Register, offset… member
DS32K148_SCB.h80 …__IO uint32_t ICSR; /**< Interrupt Control and State Register, offset… member
DS32K146_SCB.h80 …__IO uint32_t ICSR; /**< Interrupt Control and State Register, offset… member
/hal_nxp-3.6.0/mcux/mcux-sdk/CMSIS/Include/
Dcore_cm0.h344 …__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regis… member
Dcore_cm1.h344 …__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regis… member
Dcore_sc000.h350 …__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regis… member
Dcore_cm0plus.h358 …__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regis… member
Dcore_armv8mbl.h384 …__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regis… member
Dcore_cm3.h377 …__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regis… member
Dcore_sc300.h377 …__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regis… member
Dcore_cm4.h443 …__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regis… member
Dcore_cm23.h384 …__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regis… member
Dcore_armv8mml.h500 …__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regis… member
Dcore_cm33.h500 …__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regis… member
/hal_nxp-3.6.0/mcux/mcux-sdk/CMSIS/Core/Include/
Dcore_cm0plus.h358 …__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regis… member
Dcore_cm4.h448 …__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regis… member
Dcore_cm7.h463 …__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regis… member
/hal_nxp-3.6.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_SCB.h84 …__IO uint32_t ICSR; /**< Interrupt Control and State Register, offset… member
/hal_nxp-3.6.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_SCB.h83 …__IO uint32_t ICSR; /**< Interrupt Control and State Register, offset… member

12