Searched refs:kSCG_SysClkDivBy1 (Results 1 – 4 of 4) sorted by relevance
| /Zephyr-latest/soc/openisa/rv32m1/ |
| D | soc.c | 46 .divBus = kSCG_SysClkDivBy1,
47 .divExt = kSCG_SysClkDivBy1,
48 .divCore = kSCG_SysClkDivBy1,
185 .divCore = kSCG_SysClkDivBy1, in rv32m1_switch_to_sirc()
|
| /Zephyr-latest/soc/nxp/mcx/mcxw/ |
| D | soc.c | 69 .divCore = (uint32_t)kSCG_SysClkDivBy1, in clock_init()
85 .divBus = (uint32_t)kSCG_SysClkDivBy1, /* Bus Clock Divider: divided by 1 */ in clock_init()
86 .divCore = (uint32_t)kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */ in clock_init()
|
| /Zephyr-latest/soc/nxp/kinetis/ke1xf/ |
| D | soc.c | 152 .divBus = kSCG_SysClkDivBy1, in clk_init()
153 .divCore = kSCG_SysClkDivBy1, in clk_init()
|
| /Zephyr-latest/soc/nxp/kinetis/ke1xz/ |
| D | soc.c | 88 .divCore = kSCG_SysClkDivBy1, in clk_init()
|
