Searched refs:WM8962_CHECK_RET (Results 1 – 1 of 1) sorted by relevance
| /hal_nxp-3.5.0/mcux/mcux-sdk/components/codec/wm8962/ |
| D | fsl_wm8962.c | 12 #define WM8962_CHECK_RET(x, status) \ macro
78 WM8962_CHECK_RET(WM8962_WriteReg(handle, 0x57, 0x20U), ret); in WM8962_StartSequence()
79 WM8962_CHECK_RET(WM8962_WriteReg(handle, 0x5A, (uint16_t)id), ret); in WM8962_StartSequence()
82 WM8962_CHECK_RET(WM8962_ReadReg(handle, 0x5D, &sequenceStat), ret); in WM8962_StartSequence()
148 WM8962_CHECK_RET(WM8962_ModifyReg(handle, WM8962_FLL_CTRL_1, 1U, 0U), ret); in WM8962_SetInternalFllConfig()
149 …WM8962_CHECK_RET(WM8962_GetClockDivider(fllConfig->fllReferenceClockFreq, WM8962_FLL_MAX_REFERENCE… in WM8962_SetInternalFllConfig()
221 …WM8962_CHECK_RET(WM8962_ModifyReg(handle, WM8962_FLL_CTRL_2, 0x1FBU, (uint16_t)(refDiv | (fllOutDi… in WM8962_SetInternalFllConfig()
222 WM8962_CHECK_RET(WM8962_ModifyReg(handle, WM8962_FLL_CTRL_3, 7U, (uint16_t)fllRatio), ret); in WM8962_SetInternalFllConfig()
223 WM8962_CHECK_RET(WM8962_WriteReg(handle, WM8962_FLL_CTRL_6, (uint16_t)fllTheta), ret); in WM8962_SetInternalFllConfig()
224 WM8962_CHECK_RET(WM8962_WriteReg(handle, WM8962_FLL_CTRL_7, (uint16_t)fllLambda), ret); in WM8962_SetInternalFllConfig()
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