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Searched refs:USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK (Results 1 – 25 of 59) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_clock.c1682 USBPHY1->PLL_SIC_SET = (USBPHY_PLL_SIC_PLL_POWER(1) | USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK); in CLOCK_EnableUsbhs0PhyPllClock()
1788 USBPHY2->PLL_SIC_SET = (USBPHY_PLL_SIC_PLL_POWER(1) | USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK); in CLOCK_EnableUsbhs1PhyPllClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_clock.c1682 USBPHY1->PLL_SIC_SET = (USBPHY_PLL_SIC_PLL_POWER(1) | USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK); in CLOCK_EnableUsbhs0PhyPllClock()
1788 USBPHY2->PLL_SIC_SET = (USBPHY_PLL_SIC_PLL_POWER(1) | USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK); in CLOCK_EnableUsbhs1PhyPllClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_clock.c1682 USBPHY1->PLL_SIC_SET = (USBPHY_PLL_SIC_PLL_POWER(1) | USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK); in CLOCK_EnableUsbhs0PhyPllClock()
1788 USBPHY2->PLL_SIC_SET = (USBPHY_PLL_SIC_PLL_POWER(1) | USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK); in CLOCK_EnableUsbhs1PhyPllClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_clock.c1669 USBPHY1->PLL_SIC_SET = (USBPHY_PLL_SIC_PLL_POWER(1) | USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK); in CLOCK_EnableUsbhs0PhyPllClock()
1775 USBPHY2->PLL_SIC_SET = (USBPHY_PLL_SIC_PLL_POWER(1) | USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK); in CLOCK_EnableUsbhs1PhyPllClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_clock.c1682 USBPHY1->PLL_SIC_SET = (USBPHY_PLL_SIC_PLL_POWER(1) | USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK); in CLOCK_EnableUsbhs0PhyPllClock()
1788 USBPHY2->PLL_SIC_SET = (USBPHY_PLL_SIC_PLL_POWER(1) | USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK); in CLOCK_EnableUsbhs1PhyPllClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_clock.c1669 USBPHY1->PLL_SIC_SET = (USBPHY_PLL_SIC_PLL_POWER(1) | USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK); in CLOCK_EnableUsbhs0PhyPllClock()
1775 USBPHY2->PLL_SIC_SET = (USBPHY_PLL_SIC_PLL_POWER(1) | USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK); in CLOCK_EnableUsbhs1PhyPllClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_clock.c1682 USBPHY1->PLL_SIC_SET = (USBPHY_PLL_SIC_PLL_POWER(1) | USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK); in CLOCK_EnableUsbhs0PhyPllClock()
1788 USBPHY2->PLL_SIC_SET = (USBPHY_PLL_SIC_PLL_POWER(1) | USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK); in CLOCK_EnableUsbhs1PhyPllClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_clock.c1538 USBPHY->PLL_SIC_SET = (USBPHY_PLL_SIC_PLL_POWER(1) | USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK); in CLOCK_EnableUsbHs0PhyPllClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_clock.c1534 USBPHY->PLL_SIC_SET = (USBPHY_PLL_SIC_PLL_POWER(1) | USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK); in CLOCK_EnableUsbHs0PhyPllClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_clock.c1862 USBPHY->PLL_SIC_SET = USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK; in CLOCK_EnableUsbHs0PhyPllClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_clock.c1862 USBPHY->PLL_SIC_SET = USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK; in CLOCK_EnableUsbHs0PhyPllClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_clock.c1862 USBPHY->PLL_SIC_SET = USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK; in CLOCK_EnableUsbHs0PhyPllClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5528/
DLPC5528.h27747 #define USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK (0x200000U) macro
27749 …2_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5526/
DLPC5526.h27747 #define USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK (0x200000U) macro
27749 …2_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S28/
DLPC55S28.h29403 #define USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK (0x200000U) macro
29405 …2_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S26/
DLPC55S26.h29403 #define USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK (0x200000U) macro
29405 …2_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S16/
DLPC55S16.h32078 #define USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK (0x200000U) macro
32080 …2_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S14/
DLPC55S14.h32077 #define USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK (0x200000U) macro
32079 …2_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5514/
DLPC5514.h29809 #define USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK (0x200000U) macro
29811 …2_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S66/
DLPC55S66_cm33_core1.h30035 #define USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK (0x200000U) macro
30037 …2_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK)
DLPC55S66_cm33_core0.h30035 #define USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK (0x200000U) macro
30037 …2_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S69/
DLPC55S69_cm33_core0.h30035 #define USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK (0x200000U) macro
30037 …2_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK)
DLPC55S69_cm33_core1.h30035 #define USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK (0x200000U) macro
30037 …2_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5516/
DLPC5516.h29810 #define USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK (0x200000U) macro
29812 …2_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h31284 #define USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK (0x200000U) macro
31286 …2_t)(((uint32_t)(x)) << USBPHY_PLL_SIC_PLL_REG_ENABLE_SHIFT)) & USBPHY_PLL_SIC_PLL_REG_ENABLE_MASK)

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