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Searched refs:SCG_APLL_POSTDIV1_BASE_VALUE (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/drivers/
Dfsl_clock.c55 #define SCG_APLL_POSTDIV1_BASE_VALUE 1U macro
1230 … freq /= (SCG_APLLCFG_POSTDIV1_VAL + SCG_APLL_POSTDIV1_BASE_VALUE); /* Post-divider 1. */ in CLOCK_GetAuxPllFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/drivers/
Dfsl_clock.c55 #define SCG_APLL_POSTDIV1_BASE_VALUE 1U macro
1230 … freq /= (SCG_APLLCFG_POSTDIV1_VAL + SCG_APLL_POSTDIV1_BASE_VALUE); /* Post-divider 1. */ in CLOCK_GetAuxPllFreq()