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Searched refs:XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK (Results 1 – 19 of 19) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
Dfsl_clock.c261 while ((XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK) == 0UL) in CLOCK_InitExternalClk()
DMIMXRT1011.h30911 #define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK (0x10000U) macro
30917 … XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MAS…
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
Dfsl_clock.c195 while ((XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK) == 0UL) in CLOCK_InitExternalClk()
DMIMXRT1015.h33840 #define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK (0x10000U) macro
33846 … XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MAS…
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
Dfsl_clock.c165 while ((XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK) == 0U) in CLOCK_InitExternalClk()
DMIMXRT1051.h42100 #define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK (0x10000U) macro
42106 … XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MAS…
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
Dfsl_clock.c194 while ((XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK) == 0UL) in CLOCK_InitExternalClk()
DMIMXRT1021.h45974 #define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK (0x10000U) macro
45980 … XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MAS…
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
Dfsl_clock.c165 while ((XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK) == 0U) in CLOCK_InitExternalClk()
DMIMXRT1061.h44508 #define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK (0x10000U) macro
44514 … XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MAS…
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
Dfsl_clock.c194 while ((XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK) == 0UL) in CLOCK_InitExternalClk()
DMIMXRT1024.h45956 #define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK (0x10000U) macro
45962 … XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MAS…
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
Dfsl_clock.c195 while ((XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK) == 0U) in CLOCK_InitExternalClk()
DMIMXRT1052.h51908 #define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK (0x10000U) macro
51914 … XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MAS…
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
Dfsl_clock.c196 while ((XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK) == 0U) in CLOCK_InitExternalClk()
DMIMXRT1062.h54567 #define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK (0x10000U) macro
54573 … XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MAS…
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
Dfsl_clock.c196 while ((XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK) == 0U) in CLOCK_InitExternalClk()
DMIMXRT1064.h54493 #define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK (0x10000U) macro
54499 … XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MAS…
/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h39957 #define XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK 0x10000u macro