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Searched refs:XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h30918 #define XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK (0x20000U) macro
30920 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h33847 #define XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK (0x20000U) macro
33849 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h45982 #define XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK (0x20000U) macro
45984 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h45964 #define XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK (0x20000U) macro
45966 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h42107 #define XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK (0x20000U) macro
42109 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h51916 #define XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK (0x20000U) macro
51918 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h44515 #define XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK (0x20000U) macro
44517 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h54575 #define XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK (0x20000U) macro
54577 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h54501 #define XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK (0x20000U) macro
54503 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK)
/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h39959 #define XTALOSC24M_LOWPWR_CTRL_MIX_PWRGATE_MASK 0x20000u macro