Home
last modified time | relevance | path

Searched refs:XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h31010 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK (0x20U) macro
31016 …2_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h33939 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK (0x20U) macro
33945 …2_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h46092 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK (0x20U) macro
46098 …2_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h46074 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK (0x20U) macro
46080 …2_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h42199 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK (0x20U) macro
42205 …2_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h52026 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK (0x20U) macro
52032 …2_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h44607 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK (0x20U) macro
44613 …2_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h54685 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK (0x20U) macro
54691 …2_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h54611 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK (0x20U) macro
54617 …2_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK)
/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h40004 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_SEL_MASK 0x20u macro