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Searched refs:XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h31026 #define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK (0x200U) macro
31028 …(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h33955 #define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK (0x200U) macro
33957 …(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h46112 #define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK (0x200U) macro
46114 …(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h46094 #define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK (0x200U) macro
46096 …(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h42215 #define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK (0x200U) macro
42217 …(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h52046 #define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK (0x200U) macro
52048 …(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h44623 #define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK (0x200U) macro
44625 …(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h54705 #define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK (0x200U) macro
54707 …(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h54631 #define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK (0x200U) macro
54633 …(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK)
/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h40012 #define XTALOSC24M_LOWPWR_CTRL_CLR_L2_PWRGATE_MASK 0x200u macro