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Searched refs:TEMPMON_TEMPSENSE0_POWER_DOWN_MASK (Results 1 – 11 of 11) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/imx/
Dfsl_tempmon.c61 base->TEMPSENSE0 &= ~TEMPMON_TEMPSENSE0_POWER_DOWN_MASK; in TEMPMON_Init()
88 base->TEMPSENSE0 |= TEMPMON_TEMPSENSE0_POWER_DOWN_MASK; in TEMPMON_Deinit()
/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h25192 #define TEMPMON_TEMPSENSE0_POWER_DOWN_MASK (0x1U) macro
25198 …2_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_POWER_DOWN_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h27506 #define TEMPMON_TEMPSENSE0_POWER_DOWN_MASK (0x1U) macro
27512 …2_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_POWER_DOWN_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h36775 #define TEMPMON_TEMPSENSE0_POWER_DOWN_MASK (0x1U) macro
36781 …2_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_POWER_DOWN_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h36757 #define TEMPMON_TEMPSENSE0_POWER_DOWN_MASK (0x1U) macro
36763 …2_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_POWER_DOWN_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h33609 #define TEMPMON_TEMPSENSE0_POWER_DOWN_MASK (0x1U) macro
33615 …2_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_POWER_DOWN_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h42145 #define TEMPMON_TEMPSENSE0_POWER_DOWN_MASK (0x1U) macro
42151 …2_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_POWER_DOWN_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h36017 #define TEMPMON_TEMPSENSE0_POWER_DOWN_MASK (0x1U) macro
36023 …2_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_POWER_DOWN_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h44804 #define TEMPMON_TEMPSENSE0_POWER_DOWN_MASK (0x1U) macro
44810 …2_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_POWER_DOWN_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h44730 #define TEMPMON_TEMPSENSE0_POWER_DOWN_MASK (0x1U) macro
44736 …2_t)(((uint32_t)(x)) << TEMPMON_TEMPSENSE0_POWER_DOWN_SHIFT)) & TEMPMON_TEMPSENSE0_POWER_DOWN_MASK)
/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h34921 #define TEMPMON_TEMPSENSE0_POWER_DOWN_MASK 0x1u macro