Searched refs:SRPC (Results 1 – 14 of 14) sorted by relevance
| /hal_nxp-2.7.6/mcux/drivers/imx/ |
| D | fsl_spdif.c | 114 base->SRPC = SPDIF_SRPC_CLKSRC_SEL(config->DPLLClkSource) | SPDIF_SRPC_GAINSEL(config->gain); in SPDIF_Init()
258 …uint64_t gain = s_spdif_gain[((base->SRPC & SPDIF_SRPC_GAINSEL_MASK) >> SPDIF_SRPC_GAINSEL_S… in SPDIF_GetRxSampleRate()
264 while ((base->SRPC & SPDIF_SRPC_LOCK_MASK) == 0U) in SPDIF_GetRxSampleRate()
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| /hal_nxp-2.7.6/imx/devices/MCIMX6X/ |
| D | MCIMX6X_M4.h | 33786 __IO uint32_t SRPC; /**< PhaseConfig Register, offset: 0x8 */ member
33850 #define SPDIF_SRPC_REG(base) ((base)->SRPC)
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1011/ |
| D | MIMXRT1011.h | 24438 __IO uint32_t SRPC; /**< PhaseConfig Register, offset: 0x8 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1015/ |
| D | MIMXRT1015.h | 26758 __IO uint32_t SRPC; /**< PhaseConfig Register, offset: 0x8 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1021/ |
| D | MIMXRT1021.h | 35913 __IO uint32_t SRPC; /**< PhaseConfig Register, offset: 0x8 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1024/ |
| D | MIMXRT1024.h | 35895 __IO uint32_t SRPC; /**< PhaseConfig Register, offset: 0x8 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1051/ |
| D | MIMXRT1051.h | 32871 __IO uint32_t SRPC; /**< PhaseConfig Register, offset: 0x8 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1052/ |
| D | MIMXRT1052.h | 41298 __IO uint32_t SRPC; /**< PhaseConfig Register, offset: 0x8 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1061/ |
| D | MIMXRT1061.h | 35276 __IO uint32_t SRPC; /**< PhaseConfig Register, offset: 0x8 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1062/ |
| D | MIMXRT1062.h | 43954 __IO uint32_t SRPC; /**< PhaseConfig Register, offset: 0x8 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1064/ |
| D | MIMXRT1064.h | 43880 __IO uint32_t SRPC; /**< PhaseConfig Register, offset: 0x8 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMX8MM6/ |
| D | MIMX8MM6_cm4.h | 47945 __IO uint32_t SRPC; /**< PhaseConfig Register, offset: 0x8 */ member
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| /hal_nxp-2.7.6/mcux/devices/MIMXRT1176/ |
| D | MIMXRT1176_cm7.h | 86818 __IO uint32_t SRPC; /**< PhaseConfig Register, offset: 0x8 */ member
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| D | MIMXRT1176_cm4.h | 87749 __IO uint32_t SRPC; /**< PhaseConfig Register, offset: 0x8 */ member
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