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Searched refs:SNVS_HPSR_HPTA_MASK (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/imx/
Dfsl_snvs_hp.c30 #if !(defined(SNVS_HPSR_HPTA_MASK))
31 #define SNVS_HPSR_HPTA_MASK (0x1U) macro
518 if ((base->HPSR & SNVS_HPSR_HPTA_MASK) != 0U) in SNVS_HP_RTC_GetStatusFlags()
Dfsl_snvs_hp.h38 kSNVS_RTC_AlarmInterruptFlag = SNVS_HPSR_HPTA_MASK, /*!< RTC time alarm flag */
/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h23754 #define SNVS_HPSR_HPTA_MASK (0x1U) macro
23760 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_HPTA_SHIFT)) & SNVS_HPSR_HPTA_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h26074 #define SNVS_HPSR_HPTA_MASK (0x1U) macro
26080 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_HPTA_SHIFT)) & SNVS_HPSR_HPTA_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h35136 #define SNVS_HPSR_HPTA_MASK (0x1U) macro
35142 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_HPTA_SHIFT)) & SNVS_HPSR_HPTA_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h35118 #define SNVS_HPSR_HPTA_MASK (0x1U) macro
35124 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_HPTA_SHIFT)) & SNVS_HPSR_HPTA_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h32187 #define SNVS_HPSR_HPTA_MASK (0x1U) macro
32193 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_HPTA_SHIFT)) & SNVS_HPSR_HPTA_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h40515 #define SNVS_HPSR_HPTA_MASK (0x1U) macro
40521 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_HPTA_SHIFT)) & SNVS_HPSR_HPTA_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h34592 #define SNVS_HPSR_HPTA_MASK (0x1U) macro
34598 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_HPTA_SHIFT)) & SNVS_HPSR_HPTA_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h43171 #define SNVS_HPSR_HPTA_MASK (0x1U) macro
43177 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_HPTA_SHIFT)) & SNVS_HPSR_HPTA_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h43097 #define SNVS_HPSR_HPTA_MASK (0x1U) macro
43103 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_HPTA_SHIFT)) & SNVS_HPSR_HPTA_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMX8MM6/
DMIMX8MM6_cm4.h47602 #define SNVS_HPSR_HPTA_MASK (0x1U) macro
47608 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_HPTA_SHIFT)) & SNVS_HPSR_HPTA_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1176/
DMIMXRT1176_cm7.h85384 #define SNVS_HPSR_HPTA_MASK (0x1U) macro
85390 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_HPTA_SHIFT)) & SNVS_HPSR_HPTA_MASK)
DMIMXRT1176_cm4.h86315 #define SNVS_HPSR_HPTA_MASK (0x1U) macro
86321 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_HPTA_SHIFT)) & SNVS_HPSR_HPTA_MASK)