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Searched refs:DEBUG0_STATUS (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h37849 …__I uint32_t DEBUG0_STATUS; /**< UTMI Debug Status Register 0, offset: … member
37889 #define USBPHY_DEBUG0_STATUS_REG(base) ((base)->DEBUG0_STATUS)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h27998 …__I uint32_t DEBUG0_STATUS; /**< UTMI Debug Status Register 0, offset: 0x60 */ member
/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h27790 …__I uint32_t DEBUG0_STATUS; /**< UTMI Debug Status Register 0, offset: 0x60 */ member
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h30588 …__I uint32_t DEBUG0_STATUS; /**< UTMI Debug Status Register 0, offset: 0x60 */ member
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h40242 …__I uint32_t DEBUG0_STATUS; /**< UTMI Debug Status Register 0, offset: 0x60 */ member
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h40224 …__I uint32_t DEBUG0_STATUS; /**< UTMI Debug Status Register 0, offset: 0x60 */ member
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h37158 …__I uint32_t DEBUG0_STATUS; /**< UTMI Debug Status Register 0, offset: 0x60 */ member
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h46128 …__I uint32_t DEBUG0_STATUS; /**< UTMI Debug Status Register 0, offset: 0x60 */ member
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h39566 …__I uint32_t DEBUG0_STATUS; /**< UTMI Debug Status Register 0, offset: 0x60 */ member
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h48787 …__I uint32_t DEBUG0_STATUS; /**< UTMI Debug Status Register 0, offset: 0x60 */ member
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h48713 …__I uint32_t DEBUG0_STATUS; /**< UTMI Debug Status Register 0, offset: 0x60 */ member
/hal_nxp-2.7.6/mcux/devices/MIMXRT1176/
DMIMXRT1176_cm7.h95007 …__I uint32_t DEBUG0_STATUS; /**< UTMI Debug Status Register 0, offset: 0x60 */ member
DMIMXRT1176_cm4.h95938 …__I uint32_t DEBUG0_STATUS; /**< UTMI Debug Status Register 0, offset: 0x60 */ member