Searched refs:SYS_GPE_MFPH_PE9MFP_Pos (Results 1 – 2 of 2) sorted by relevance
989 #define SYS_GPE_MFPH_PE9MFP_GPIO (0x00UL<<SYS_GPE_MFPH_PE9MFP_Pos) /*!< General purpo…990 #define SYS_GPE_MFPH_PE9MFP_EBI_ADR11 (0x02UL<<SYS_GPE_MFPH_PE9MFP_Pos) /*!< EBI address/d…991 #define SYS_GPE_MFPH_PE9MFP_EMAC_RMII_MDIO (0x03UL<<SYS_GPE_MFPH_PE9MFP_Pos) /*!< RMII Manageme…992 #define SYS_GPE_MFPH_PE9MFP_I2S0_MCLK (0x04UL<<SYS_GPE_MFPH_PE9MFP_Pos) /*!< I2S0 master c…993 #define SYS_GPE_MFPH_PE9MFP_SPI2_MISO (0x05UL<<SYS_GPE_MFPH_PE9MFP_Pos) /*!< 1st SPI2 MISO…994 #define SYS_GPE_MFPH_PE9MFP_USCI1_CTL0 (0x06UL<<SYS_GPE_MFPH_PE9MFP_Pos) /*!< USCI1 control…995 #define SYS_GPE_MFPH_PE9MFP_UART2_RXD (0x07UL<<SYS_GPE_MFPH_PE9MFP_Pos) /*!< Data receiver…996 #define SYS_GPE_MFPH_PE9MFP_EPWM0_CH1 (0x0AUL<<SYS_GPE_MFPH_PE9MFP_Pos) /*!< EPWM0 channel…997 #define SYS_GPE_MFPH_PE9MFP_EPWM0_BRAKE1 (0x0BUL<<SYS_GPE_MFPH_PE9MFP_Pos) /*!< Brake input p…998 #define SYS_GPE_MFPH_PE9MFP_ECAP0_IC1 (0x0CUL<<SYS_GPE_MFPH_PE9MFP_Pos) /*!< Input 1 of en…[all …]
2687 #define SYS_GPE_MFPH_PE9MFP_Pos (4) /*!< SYS… macro2688 #define SYS_GPE_MFPH_PE9MFP_Msk (0xful << SYS_GPE_MFPH_PE9MFP_Pos) /*!< SYS…
