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Searched refs:CY_TCPWM_INPUT_LEVEL (Results 1 – 5 of 5) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_tcpwm_quaddec.c79 …PWM_CNT_TR_CTRL1(base, cntNum) = (_VAL2FLD(TCPWM_CNT_TR_CTRL1_CAPTURE_EDGE, CY_TCPWM_INPUT_LEVEL) | in Cy_TCPWM_QuadDec_Init()
80 _VAL2FLD(TCPWM_CNT_TR_CTRL1_COUNT_EDGE, CY_TCPWM_INPUT_LEVEL) | in Cy_TCPWM_QuadDec_Init()
81 _VAL2FLD(TCPWM_CNT_TR_CTRL1_START_EDGE, CY_TCPWM_INPUT_LEVEL) | in Cy_TCPWM_QuadDec_Init()
/hal_infineon-latest/mtb-hal-cat1/source/
Dcyhal_tcpwm_common.c970 …PWM_CNT_TR_CTRL1(obj->base, chnl) |= _VAL2FLD(TCPWM_CNT_TR_CTRL1_START_EDGE, CY_TCPWM_INPUT_LEVEL); in _cyhal_tcpwm_irq_handler()
975 …CPWM_CNT_TR_CTRL1(obj->base, chnl) |= _VAL2FLD(TCPWM_CNT_TR_CTRL1_STOP_EDGE, CY_TCPWM_INPUT_LEVEL); in _cyhal_tcpwm_irq_handler()
980 …WM_CNT_TR_CTRL1(obj->base, chnl) |= _VAL2FLD(TCPWM_CNT_TR_CTRL1_RELOAD_EDGE, CY_TCPWM_INPUT_LEVEL); in _cyhal_tcpwm_irq_handler()
985 …PWM_CNT_TR_CTRL1(obj->base, chnl) |= _VAL2FLD(TCPWM_CNT_TR_CTRL1_COUNT_EDGE, CY_TCPWM_INPUT_LEVEL); in _cyhal_tcpwm_irq_handler()
990 …M_CNT_TR_CTRL1(obj->base, chnl) |= _VAL2FLD(TCPWM_CNT_TR_CTRL1_CAPTURE_EDGE, CY_TCPWM_INPUT_LEVEL); in _cyhal_tcpwm_irq_handler()
Dcyhal_quaddec.c394 … config.phiAInputMode = CY_TCPWM_INPUT_LEVEL; // Pass thorugh (no edge detection) in cyhal_quaddec_init()
395 … config.phiBInputMode = CY_TCPWM_INPUT_LEVEL; // Pass thorugh (no edge detection) in cyhal_quaddec_init()
Dcyhal_pwm.c438 .countInputMode = CY_TCPWM_INPUT_LEVEL, in cyhal_pwm_init_adv()
/hal_infineon-latest/mtb-pdl-cat1/drivers/include/
Dcy_tcpwm.h435 #define CY_TCPWM_INPUT_LEVEL (3U) macro