/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/source/ |
D | cy_rtc.c | 186 …dateTime->hrFormat = ((_FLD2BOOL(BACKUP_RTC_TIME_CTRL_12HR, tmpTime)) ? CY_RTC_12_HOURS : CY_RTC_2… in Cy_RTC_GetDateAndTime() 346 …((_FLD2BOOL(BACKUP_ALM1_TIME_ALM_SEC_EN, tmpAlarmTime)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISAB… in Cy_RTC_GetAlarmDateAndTime() 349 …((_FLD2BOOL(BACKUP_ALM1_TIME_ALM_MIN_EN, tmpAlarmTime)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISAB… in Cy_RTC_GetAlarmDateAndTime() 386 …((_FLD2BOOL(BACKUP_ALM1_TIME_ALM_HOUR_EN, tmpAlarmTime)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISA… in Cy_RTC_GetAlarmDateAndTime() 390 …((_FLD2BOOL(BACKUP_ALM1_TIME_ALM_DAY_EN, tmpAlarmTime)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISAB… in Cy_RTC_GetAlarmDateAndTime() 394 …((_FLD2BOOL(BACKUP_ALM1_DATE_ALM_DATE_EN, tmpAlarmDate)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISA… in Cy_RTC_GetAlarmDateAndTime() 398 …((_FLD2BOOL(BACKUP_ALM1_DATE_ALM_MON_EN, tmpAlarmDate)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISAB… in Cy_RTC_GetAlarmDateAndTime() 401 … ((_FLD2BOOL(BACKUP_ALM1_DATE_ALM_EN, tmpAlarmDate)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); in Cy_RTC_GetAlarmDateAndTime() 410 …((_FLD2BOOL(BACKUP_ALM2_TIME_ALM_SEC_EN, tmpAlarmTime)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISAB… in Cy_RTC_GetAlarmDateAndTime() 414 …((_FLD2BOOL(BACKUP_ALM2_TIME_ALM_MIN_EN, tmpAlarmTime)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISAB… in Cy_RTC_GetAlarmDateAndTime() [all …]
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D | cy_scb_spi.c | 293 if (!_FLD2BOOL(SCB_SPI_CTRL_MASTER_MODE, SCB_SPI_CTRL(base))) in Cy_SCB_SPI_Disable() 382 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_SPI_DeepSleepCallback() 422 if (!_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_SPI_DeepSleepCallback() 441 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_SPI_DeepSleepCallback() 465 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_SPI_DeepSleepCallback() 695 if (_FLD2BOOL(SCB_SPI_CTRL_MASTER_MODE, SCB_SPI_CTRL(base))) in Cy_SCB_SPI_Transfer() 767 if (_FLD2BOOL(SCB_SPI_CTRL_MASTER_MODE, SCB_SPI_CTRL(base))) in Cy_SCB_SPI_AbortTransfer() 1009 uint32_t level = (_FLD2BOOL(SCB_SPI_CTRL_MASTER_MODE, SCB_SPI_CTRL(base))) ? in HandleReceive()
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D | cy_sar.c | 36 #define IS_RIGHT_ALIGN (!_FLD2BOOL(SAR_SAMPLE_CTRL_LEFT_ALIGN, SAR_SAMPLE_CTRL(base))) 468 if (!_FLD2BOOL(SAR_CTRL_ENABLED, SAR_CTRL(base))) in Cy_SAR_Enable() 497 if (_FLD2BOOL(SAR_CTRL_ENABLED, SAR_CTRL(base))) in Cy_SAR_Disable() 499 while (_FLD2BOOL(SAR_STATUS_BUSY, SAR_STATUS(base))) in Cy_SAR_Disable() 553 while (_FLD2BOOL(SAR_STATUS_BUSY, SAR_STATUS(base))) in Cy_SAR_DeepSleep() 871 … isSingleEnded = !_FLD2BOOL(SAR_INJ_CHAN_CONFIG_INJ_DIFFERENTIAL_EN, SAR_INJ_CHAN_CONFIG(base)); in Cy_SAR_IsChannelSingleEnded() 1152 if (!_FLD2BOOL(SAR_SAMPLE_CTRL_AVG_SHIFT, SAR_SAMPLE_CTRL(base))) in Cy_SAR_RawCounts2Counts() 1154 …if (((chan < CY_SAR_SEQ_NUM_CHANNELS) && _FLD2BOOL(SAR_CHAN_CONFIG_AVG_EN, SAR_CHAN_CONFIG… in Cy_SAR_RawCounts2Counts() 1155 …((chan == CY_SAR_INJ_CHANNEL) && _FLD2BOOL(SAR_INJ_CHAN_CONFIG_INJ_AVG_EN, SAR_INJ_CHAN_CONFIG… in Cy_SAR_RawCounts2Counts()
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D | cy_smif_sfdp.c | 1161 if (_FLD2BOOL(CY_SMIF_SFDP_FAST_READ_1_4_4, in SfdpGetReadCmdParams() 1166 if(_FLD2BOOL(CY_SMIF_SFDP_DTR_SUPPORT, (uint32_t) sfdpBuffer[sfdpDataIndex])) in SfdpGetReadCmdParams() 1181 else if (_FLD2BOOL(CY_SMIF_SFDP_FAST_READ_1_1_4, in SfdpGetReadCmdParams() 1196 if ((_FLD2BOOL(CY_SMIF_SFDP_FAST_READ_1_2_2, in SfdpGetReadCmdParams() 1205 if (_FLD2BOOL(CY_SMIF_SFDP_FAST_READ_1_1_2, in SfdpGetReadCmdParams() 1316 if (_FLD2BOOL(SUPPORT_FAST_READ_1S_4S_4S_CMD, sfdpForBytesTableDword1)) in SfdpGetReadFourBytesCmd() 1322 if (_FLD2BOOL(SUPPORT_FAST_READ_1S_1S_4S_CMD, sfdpForBytesTableDword1)) in SfdpGetReadFourBytesCmd() 1328 if (_FLD2BOOL(SUPPORT_FAST_READ_1S_2S_2S_CMD, sfdpForBytesTableDword1)) in SfdpGetReadFourBytesCmd() 1334 if (_FLD2BOOL(SUPPORT_FAST_READ_1S_1S_2S_CMD, sfdpForBytesTableDword1)) in SfdpGetReadFourBytesCmd() 1340 if (_FLD2BOOL(SUPPORT_FAST_READ_1S_1S_1S_CMD, sfdpForBytesTableDword1)) in SfdpGetReadFourBytesCmd() [all …]
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D | cy_sysclk_v2.c | 323 retVal = _FLD2BOOL(PERI_DIV_8_CTL_EN, PERI_DIV_8_CTL(instNum, grpNum, dividerNum)); in Cy_SysClk_PeriPclkGetDividerEnabled() 326 retVal = _FLD2BOOL(PERI_DIV_16_CTL_EN, PERI_DIV_16_CTL(instNum, grpNum, dividerNum)); in Cy_SysClk_PeriPclkGetDividerEnabled() 329 … retVal = _FLD2BOOL(PERI_DIV_16_5_CTL_EN, PERI_DIV_16_5_CTL(instNum, grpNum, dividerNum)); in Cy_SysClk_PeriPclkGetDividerEnabled() 332 … retVal = _FLD2BOOL(PERI_DIV_24_5_CTL_EN, PERI_DIV_24_5_CTL(instNum, grpNum, dividerNum)); in Cy_SysClk_PeriPclkGetDividerEnabled() 508 return (_FLD2BOOL(SRSS_CLK_SELECT_PUMP_ENABLE, SRSS_CLK_SELECT)); in Cy_SysClk_ClkPumpIsEnabled() 856 retVal = _FLD2BOOL(SRSS_CLK_ROOT_SELECT_ENABLE, SRSS_CLK_ROOT_SELECT[clkHf]); in Cy_SysClk_ClkHfIsEnabled() 955 return !(_FLD2BOOL(SRSS_CLK_DIRECT_SELECT_DIRECT_MUX, SRSS_CLK_DIRECT_SELECT[clkHf])); in Cy_SysClk_IsClkHfDirectSelEnabled() 976 return !(_FLD2BOOL(SRSS_CLK_ROOT_SELECT_DIRECT_MUX, SRSS_CLK_ROOT_SELECT[clkHf])); in Cy_SysClk_IsClkHfDirectSelEnabled() 1155 return (_FLD2BOOL(BACKUP_STATUS_WCO_OK, BACKUP_STATUS)); in Cy_SysClk_WcoOkay() 1157 return (_FLD2BOOL(SRSS_CLK_WCO_STATUS_WCO_OK, BACKUP_WCO_STATUS)); in Cy_SysClk_WcoOkay() [all …]
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D | cy_sysclk.c | 264 retVal = _FLD2BOOL(PERI_DIV_8_CTL_EN, PERI_DIV_8_CTL[dividerNum]); in Cy_SysClk_PeriphGetDividerEnabled() 267 retVal = _FLD2BOOL(PERI_DIV_16_CTL_EN, PERI_DIV_16_CTL[dividerNum]); in Cy_SysClk_PeriphGetDividerEnabled() 270 retVal = _FLD2BOOL(PERI_DIV_16_5_CTL_EN, PERI_DIV_16_5_CTL[dividerNum]); in Cy_SysClk_PeriphGetDividerEnabled() 273 retVal = _FLD2BOOL(PERI_DIV_24_5_CTL_EN, PERI_DIV_24_5_CTL[dividerNum]); in Cy_SysClk_PeriphGetDividerEnabled() 382 return (_FLD2BOOL(SRSS_CLK_SELECT_PUMP_ENABLE, SRSS_CLK_SELECT)); in Cy_SysClk_ClkPumpIsEnabled() 504 return (_FLD2BOOL(SRSS_CLK_TIMER_CTL_ENABLE, SRSS_CLK_TIMER_CTL)); in Cy_SysClk_ClkTimerIsEnabled() 642 retVal = _FLD2BOOL(SRSS_CLK_ROOT_SELECT_ENABLE, SRSS_CLK_ROOT_SELECT[clkHf]); in Cy_SysClk_ClkHfIsEnabled() 850 return (_FLD2BOOL(BACKUP_STATUS_WCO_OK, BACKUP_STATUS)); in Cy_SysClk_WcoOkay() 916 return (_FLD2BOOL(SRSS_CLK_PILO_CONFIG_PILO_CLK_EN, SRSS_CLK_PILO_CONFIG)); in Cy_SysClk_PiloIsEnabled() 1013 return (_FLD2BOOL(SRSS_CLK_ILO_CONFIG_ENABLE, SRSS_CLK_ILO_CONFIG)); in Cy_SysClk_IloIsEnabled() [all …]
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D | cy_lpcomp.c | 827 _FLD2BOOL(LPCOMP_INTR_MASK_COMP0_MASK, LPCOMP_INTR_MASK(locBase))) || in Cy_LPComp_DeepSleepCallback() 829 _FLD2BOOL(LPCOMP_INTR_MASK_COMP1_MASK, LPCOMP_INTR_MASK(locBase))))) in Cy_LPComp_DeepSleepCallback() 938 _FLD2BOOL(CY_LPCOMP_WAKEUP_PIN0, SRSS_PWR_HIBERNATE)) || in Cy_LPComp_HibernateCallback() 940 _FLD2BOOL(CY_LPCOMP_WAKEUP_PIN1, SRSS_PWR_HIBERNATE)))) in Cy_LPComp_HibernateCallback() 997 … trim->enable = _FLD2BOOL(LPCOMP_CMP0_OFFSET_TRIM_CMP0_EN, LPCOMP_CMP0_OFFSET_TRIM(base)); in Cy_LPComp_GetTrim() 1005 … trim->enable = _FLD2BOOL(LPCOMP_CMP1_OFFSET_TRIM_CMP1_EN, LPCOMP_CMP1_OFFSET_TRIM(base)); in Cy_LPComp_GetTrim()
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D | cy_seglcd.c | 503 if (_FLD2BOOL(LCD_CONTROL_LCD_MODE, LCD_CONTROL(base))) in Cy_SegLCD_Enable() 513 …for (timeout = CY_SEGLCD_TIMEOUT; (_FLD2BOOL(LCD_CONTROL_LS_EN_STAT, LCD_CONTROL(base))) && (0UL !… in Cy_SegLCD_Enable() 539 if (_FLD2BOOL(LCD_CONTROL_LCD_MODE, LCD_CONTROL(base))) /* CY_SEGLCD_SPEED_HIGH */ in Cy_SegLCD_Disable() 545 if (_FLD2BOOL(LCD_CONTROL_LS_EN, LCD_CONTROL(base))) in Cy_SegLCD_Disable() 549 …for (timeout = CY_SEGLCD_TIMEOUT; (!_FLD2BOOL(LCD_CONTROL_LS_EN_STAT, LCD_CONTROL(base))) && (0UL … in Cy_SegLCD_Disable() 556 …for (timeout = CY_SEGLCD_TIMEOUT; (_FLD2BOOL(LCD_CONTROL_LS_EN_STAT, LCD_CONTROL(base))) && (0UL !… in Cy_SegLCD_Disable()
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D | cy_sd_host.c | 1327 commandInhibit = _FLD2BOOL(SDHC_CORE_PSTATE_REG_CMD_INHIBIT, in Cy_SD_Host_PollCmdLineFree() 1364 dataInhibit = _FLD2BOOL(SDHC_CORE_PSTATE_REG_CMD_INHIBIT_DAT, in Cy_SD_Host_PollDataLineNotInhibit() 1398 while ((true == _FLD2BOOL(SDHC_CORE_PSTATE_REG_DAT_LINE_ACTIVE, SDHC_CORE_PSTATE_REG(base))) && in Cy_SD_Host_PollDataLineFree() 1405 if (true == _FLD2BOOL(SDHC_CORE_PSTATE_REG_DAT_LINE_ACTIVE, SDHC_CORE_PSTATE_REG(base))) in Cy_SD_Host_PollDataLineFree() 1434 if (true == _FLD2BOOL(SDHC_CORE_NORMAL_INT_STAT_R_BUF_RD_READY, in Cy_SD_Host_PollBufferReadReady() 1472 if (true == _FLD2BOOL(SDHC_CORE_NORMAL_INT_STAT_R_BUF_WR_READY, in Cy_SD_Host_PollBufferWriteReady() 1510 if (true == _FLD2BOOL(SDHC_CORE_NORMAL_INT_STAT_R_CMD_COMPLETE, in Cy_SD_Host_PollCmdComplete() 1548 if (true == _FLD2BOOL(SDHC_CORE_NORMAL_INT_STAT_R_XFER_COMPLETE, in Cy_SD_Host_PollTransferComplete() 1608 while ((false == _FLD2BOOL(SDHC_CORE_PSTATE_REG_BUF_RD_ENABLE, in Cy_SD_Host_CmdRxData() 1616 if (false == _FLD2BOOL(SDHC_CORE_PSTATE_REG_BUF_RD_ENABLE, in Cy_SD_Host_CmdRxData() [all …]
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D | cy_syspm_v3.c | 302 return (_FLD2BOOL(SRSS_PWR_CTL2_BGREF_LPMODE, SRSS_PWR_CTL2)? true : false); in Cy_SysPm_IsSystemLpActiveEnabled() 969 return (_FLD2BOOL(SRSS_PWR_CTL_LPM_READY, SRSS_PWR_CTL)? true : false); in Cy_SysPm_IsLpmReady() 1631 return (_FLD2BOOL(SRSS_PWR_CTL2_LINREG_OK, SRSS_PWR_CTL2)); in Cy_SysPm_LinearRegGetStatus() 1734 return (_FLD2BOOL(SRSS_PWR_REGHC_CTL_REGHC_CONFIGURED, SRSS_PWR_REGHC_CTL)); in Cy_SysPm_ReghcIsConfigured() 1764 return (_FLD2BOOL(SRSS_PWR_REGHC_STATUS_REGHC_ENABLED, SRSS_PWR_REGHC_STATUS)); in Cy_SysPm_ReghcIsEnabled() 1769 return (_FLD2BOOL(SRSS_PWR_REGHC_STATUS_REGHC_PMIC_STATUS_OK, SRSS_PWR_REGHC_STATUS)); in Cy_SysPm_ReghcIsStatusOk() 1774 return (_FLD2BOOL(SRSS_PWR_REGHC_STATUS_REGHC_SEQ_BUSY, SRSS_PWR_REGHC_STATUS)); in Cy_SysPm_ReghcIsSequencerBusy() 1799 return (_FLD2BOOL(SRSS_PWR_REGHC_STATUS_REGHC_OCD_OK, SRSS_PWR_REGHC_STATUS)); in Cy_SysPm_ReghcIsOcdWithinLimits() 1804 return (_FLD2BOOL(SRSS_PWR_REGHC_STATUS_REGHC_CKT_OK, SRSS_PWR_REGHC_STATUS)); in Cy_SysPm_ReghcIsCircuitEnabledAndOperating()
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D | cy_scb_i2c.c | 301 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_I2C_DeepSleepCallback() 339 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_I2C_DeepSleepCallback() 363 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_I2C_DeepSleepCallback() 389 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_I2C_DeepSleepCallback() 1299 …SCB_I2C_M_CMD(base) = (SCB_I2C_M_CMD_M_START_Msk | (_FLD2BOOL(SCB_I2C_STATUS_M_READ, SCB_I2C_STATU… in Cy_SCB_I2C_MasterRead() 1527 …SCB_I2C_M_CMD(base) = (SCB_I2C_M_CMD_M_START_Msk | (_FLD2BOOL(SCB_I2C_STATUS_M_READ, SCB_I2C_STATU… in Cy_SCB_I2C_MasterWrite() 1870 …SCB_I2C_M_CMD(base) = SCB_I2C_M_CMD_M_START_Msk | (_FLD2BOOL(SCB_I2C_STATUS_M_READ, SCB_I2C_STATUS… in Cy_SCB_I2C_MasterSendReStart() 1874 if (false == _FLD2BOOL(SCB_I2C_STATUS_M_READ, SCB_I2C_STATUS(base))) in Cy_SCB_I2C_MasterSendReStart() 2432 if (_FLD2BOOL(SCB_CTRL_ADDR_ACCEPT, SCB_CTRL(base))) in SlaveHandleAddress() 2439 if (!_FLD2BOOL(SCB_I2C_CTRL_S_GENERAL_IGNORE, SCB_I2C_CTRL(base))) in SlaveHandleAddress() [all …]
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D | cy_canfd.c | 583 while ((retry > 0UL) && !_FLD2BOOL(CANFD_CH_M_TTCAN_CCCR_INIT, CANFD_CCCR(base, chan))) in Cy_CANFD_DeInit() 1130 rxBuffer->r1_f->brs = _FLD2BOOL(CY_CANFD_RX_BUFFER_R1_BRS, *address); in Cy_CANFD_GetRxBuffer() 1225 rxBuffer->r1_f->brs = _FLD2BOOL(CY_CANFD_RX_BUFFER_R1_BRS, tmpregister); in Cy_CANFD_GetFIFOTop() 1297 …if (_FLD2BOOL(CANFD_CH_RXFTOP_CTL_F0TPE, CANFD_RXFTOP_CTL(base, chan))) /* The RxFifo Top pointe… in Cy_CANFD_ExtractMsgFromRXBuffer() 1325 …if (_FLD2BOOL(CANFD_CH_RXFTOP_CTL_F1TPE, CANFD_RXFTOP_CTL(base, chan))) /* The RxFifo Top pointer… in Cy_CANFD_ExtractMsgFromRXBuffer() 1570 …if (_FLD2BOOL(CANFD_CH_RXFTOP_CTL_F0TPE, CANFD_RXFTOP_CTL(base, chan))) /* The RxFifo Top pointe… in Cy_CANFD_IrqHandler() 1616 …if (_FLD2BOOL(CANFD_CH_RXFTOP_CTL_F1TPE, CANFD_RXFTOP_CTL(base, chan))) /* The RxFifo Top pointer… in Cy_CANFD_IrqHandler() 1741 if((!((_FLD2BOOL(CANFD_CH_M_TTCAN_CCCR_INIT, CANFD_CCCR(base, chan))) || in Cy_CANFD_TxBufferConfig() 1829 if(!((_FLD2BOOL(CANFD_CH_M_TTCAN_CCCR_INIT, CANFD_CCCR(base, chan))) || in Cy_CANFD_TransmitTxBuffer()
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D | cy_scb_ezi2c.c | 275 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_EZI2C_DeepSleepCallback() 313 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_EZI2C_DeepSleepCallback() 339 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_EZI2C_DeepSleepCallback() 365 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_EZI2C_DeepSleepCallback() 940 if (_FLD2BOOL(SCB_I2C_STATUS_S_READ, SCB_I2C_STATUS(base))) in HandleAddress()
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D | cy_usbfs_dev_drv.c | 438 if (_FLD2BOOL(USBFS_USBDEV_EP0_CR_SETUP_RCVD, ep0Cr)) in Ep0IntrHandler() 453 if (false == _FLD2BOOL(USBFS_USBDEV_EP0_CR_SETUP_RCVD, ep0Cr)) in Ep0IntrHandler() 469 else if (_FLD2BOOL(USBFS_USBDEV_EP0_CR_IN_RCVD, ep0Cr)) in Ep0IntrHandler() 503 else if (_FLD2BOOL(USBFS_USBDEV_EP0_CR_OUT_RCVD, ep0Cr)) in Ep0IntrHandler() 540 if (_FLD2BOOL(USBFS_USBLPM_POWER_CTL_DP_UP_EN, USBFS_DEV_LPM_POWER_CTL(base))) in BusResetIntrHandler()
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D | cy_tcpwm_quaddec.c | 95 …bool enabled_bit = _FLD2BOOL(TCPWM_GRP_CNT_V2_CTRL_ENABLED, TCPWM_GRP_CNT_CTRL(base, grp, cntNum)); in Cy_TCPWM_QuadDec_Init() 200 …bool enabled_bit = _FLD2BOOL(TCPWM_GRP_CNT_V2_CTRL_ENABLED, TCPWM_GRP_CNT_CTRL(base, grp, cntNum)); in Cy_TCPWM_QuadDec_DeInit()
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D | cy_syspm_v2.c | 352 return (_FLD2BOOL(SRSS_PWR_CTL2_REFV_DIS, SRSS_PWR_CTL2)? true : false); in Cy_SysPm_IsSystemLpActiveEnabled() 1329 return (_FLD2BOOL(SRSS_PWR_SDR0_CTL_SDR0_ALLOW_BYPASS, SRSS_PWR_SDR0_CTL)? false : true); in Cy_SysPm_IsSdrEnabled() 1333 return (_FLD2BOOL(SRSS_PWR_SDR1_CTL_SDR1_ENABLE, SRSS_PWR_SDR1_CTL)? true : false); in Cy_SysPm_IsSdrEnabled() 1353 return (_FLD2BOOL(SRSS_PWR_HVLDO0_CTL_HVLDO0_ENABLE, SRSS_PWR_HVLDO0_CTL)? true : false); in Cy_SysPm_IsHvLdoEnabled() 1727 return (_FLD2BOOL(SRSS_PWR_CTL_LPM_READY, SRSS_PWR_CTL)? true : false); in Cy_SysPm_IsLpmReady() 1860 while(!_FLD2BOOL(RAMC_STATUS_PWR_DONE, MXSRAMC_STATUS)){} in Cy_SysPm_SetSRAMMacroPwrModeInline()
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D | cy_tcpwm_counter.c | 113 …bool enabled_bit = _FLD2BOOL(TCPWM_GRP_CNT_V2_CTRL_ENABLED, TCPWM_GRP_CNT_CTRL(base, grp, cntNum)); in Cy_TCPWM_Counter_Init() 242 …bool enabled_bit = _FLD2BOOL(TCPWM_GRP_CNT_V2_CTRL_ENABLED, TCPWM_GRP_CNT_CTRL(base, grp, cntNum)); in Cy_TCPWM_Counter_DeInit()
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D | cy_prot.c | 2818 …return ((!_FLD2BOOL(PROT_SMPU_SMPU_STRUCT_ATT0_ENABLED, PROT_SMPU_SMPU_STRUCT_IDX_ATT0(smpuStcInde… in Prot_IsSmpuStructDisabled() 2819 … (!_FLD2BOOL(PROT_SMPU_SMPU_STRUCT_ATT1_ENABLED, PROT_SMPU_SMPU_STRUCT_IDX_ATT1(smpuStcIndex)))); in Prot_IsSmpuStructDisabled() 2841 return ((!_FLD2BOOL(PERI_PPU_PR_ATT0_ENABLED, PROT_PERI_PPU_PR_STRUCT_IDX_ATT0(ppuStcIndex))) && in Prot_IsPpuProgStructDisabled() 2842 (!_FLD2BOOL(PERI_PPU_PR_ATT1_ENABLED, PROT_PERI_PPU_PR_STRUCT_IDX_ATT1(ppuStcIndex)))); in Prot_IsPpuProgStructDisabled()
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D | cy_tcpwm_pwm.c | 135 …bool enabled_bit = _FLD2BOOL(TCPWM_GRP_CNT_V2_CTRL_ENABLED, TCPWM_GRP_CNT_CTRL(base, grp, cntNum)); in Cy_TCPWM_PWM_Init() 343 …bool enabled_bit = _FLD2BOOL(TCPWM_GRP_CNT_V2_CTRL_ENABLED, TCPWM_GRP_CNT_CTRL(base, grp, cntNum)); in Cy_TCPWM_PWM_DeInit()
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/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/include/ |
D | cy_evtgen.h | 466 return _FLD2BOOL(EVTGEN_INTR_COMP0, (base->INTR & (1UL << structNumber))); in Cy_EvtGen_GetStructInterrupt() 490 return _FLD2BOOL(EVTGEN_INTR_MASKED_COMP0, (base->INTR_MASKED & (1UL << structNumber))); in Cy_EvtGen_GetStructInterruptMasked() 601 return _FLD2BOOL(EVTGEN_INTR_DPSLP_COMP1, (base->INTR_DPSLP & (1UL << structNumber))); in Cy_EvtGen_GetStructInterruptDeepSleep() 625 …return _FLD2BOOL(EVTGEN_INTR_DPSLP_MASKED_COMP1, (base->INTR_DPSLP_MASKED & (1UL << structNumber))… in Cy_EvtGen_GetStructInterruptDeepSleepMasked()
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D | cy_rtc.h | 1127 if ((rtcAccessRetry != 0U) && (!_FLD2BOOL(BACKUP_RTC_RW_WRITE, BACKUP_RTC_RW))) in Cy_RTC_SyncFromRtc() 1181 if((rtcAccessRetry != 0U) && (!_FLD2BOOL(BACKUP_RTC_RW_READ, BACKUP_RTC_RW))) in Cy_RTC_WriteEnable() 1215 return((_FLD2BOOL(BACKUP_STATUS_RTC_BUSY, BACKUP_STATUS)) ? CY_RTC_BUSY : CY_RTC_AVAILABLE); in Cy_RTC_GetSyncStatus() 1235 …return((_FLD2BOOL(BACKUP_RTC_TIME_CTRL_12HR, BACKUP_RTC_TIME)) ? CY_RTC_12_HOURS : CY_RTC_24_HOURS… in Cy_RTC_GetHoursFormat()
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D | cy_wdt.h | 590 return _FLD2BOOL(WDT_CTL_ENABLE, SRSS_WDT_CTL); in Cy_WDT_IsEnabled() 592 return _FLD2BOOL(SRSS_WDT_CTL_WDT_EN, SRSS_WDT_CTL); in Cy_WDT_IsEnabled()
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D | cy_scb_spi.h | 978 return _FLD2BOOL(SCB_SPI_STATUS_BUS_BUSY, SCB_SPI_STATUS(base)); in Cy_SCB_SPI_IsBusBusy() 1274 if (_FLD2BOOL(SCB_SPI_CTRL_MASTER_MODE, SCB_SPI_CTRL(base))) in Cy_SCB_SPI_GetSlaveMasterStatus() 1303 if (_FLD2BOOL(SCB_SPI_CTRL_MASTER_MODE, SCB_SPI_CTRL(base))) in Cy_SCB_SPI_ClearSlaveMasterStatus()
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D | cy_mcwdt.h | 1805 countVal = _FLD2BOOL(MCWDT_STRUCT_MCWDT_CONFIG_WDT_CARRY0_1, MCWDT_CONFIG(base)); in Cy_MCWDT_GetCascadeCarryOutRollOver() 1808 countVal = _FLD2BOOL(MCWDT_STRUCT_MCWDT_CONFIG_WDT_CARRY1_2, MCWDT_CONFIG(base)); in Cy_MCWDT_GetCascadeCarryOutRollOver() 1881 countVal = _FLD2BOOL(MCWDT_STRUCT_MCWDT_CONFIG_WDT_MATCH0_1, MCWDT_CONFIG(base)); in Cy_MCWDT_GetCascadeMatchCombined() 1884 countVal = _FLD2BOOL(MCWDT_STRUCT_MCWDT_CONFIG_WDT_MATCH1_2, MCWDT_CONFIG(base)); in Cy_MCWDT_GetCascadeMatchCombined()
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/hal_infineon-3.6.0/mtb-hal-cat1/source/ |
D | cyhal_audio_common.c | 1581 pdl_config->txEnabled = _FLD2BOOL(I2S_CTL_TX_ENABLED, REG_I2S_CTL(base)); in _cyhal_audioss_reconstruct_pdl_config() 1582 pdl_config->rxEnabled = _FLD2BOOL(I2S_CTL_RX_ENABLED, REG_I2S_CTL(base)); in _cyhal_audioss_reconstruct_pdl_config() 1585 pdl_config->rxMasterMode = _FLD2BOOL(I2S_RX_CTL_MS, rx_ctl_val); in _cyhal_audioss_reconstruct_pdl_config() 1588 pdl_config->rxWatchdogEnable = _FLD2BOOL(I2S_RX_CTL_WD_EN, rx_ctl_val); in _cyhal_audioss_reconstruct_pdl_config() 1590 pdl_config->rxSdiLatchingTime = _FLD2BOOL(I2S_RX_CTL_B_CLOCK_INV, rx_ctl_val); in _cyhal_audioss_reconstruct_pdl_config() 1591 pdl_config->rxSckoInversion = _FLD2BOOL(I2S_RX_CTL_SCKO_POL, rx_ctl_val); in _cyhal_audioss_reconstruct_pdl_config() 1592 pdl_config->rxSckiInversion = _FLD2BOOL(I2S_RX_CTL_SCKI_POL, rx_ctl_val); in _cyhal_audioss_reconstruct_pdl_config() 1597 pdl_config->rxSignExtension = _FLD2BOOL(I2S_RX_CTL_SCKI_POL, rx_ctl_val); in _cyhal_audioss_reconstruct_pdl_config() 1602 pdl_config->txWatchdogEnable = _FLD2BOOL(I2S_TX_CTL_WD_EN, rx_ctl_val);; in _cyhal_audioss_reconstruct_pdl_config() 1607 pdl_config->txDmaTrigger = _FLD2BOOL(I2S_TR_CTL_TX_REQ_EN, REG_I2S_TR_CTL(base)); in _cyhal_audioss_reconstruct_pdl_config() [all …]
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