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Searched refs:RATIO_CTL (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/source/
Dcy_evtgen.c103 base->RATIO_CTL &= ~EVTGEN_RATIO_CTL_DYNAMIC_Msk; in Cy_EvtGen_Init()
104 base->RATIO_CTL |= EVTGEN_RATIO_CTL_VALID_Msk; in Cy_EvtGen_Init()
109 base->RATIO_CTL |= EVTGEN_RATIO_CTL_DYNAMIC_Msk | in Cy_EvtGen_Init()
137 base->RATIO_CTL = 0UL; in Cy_EvtGen_DeInit()
/hal_infineon-3.6.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_evtgen.h60 __IOM uint32_t RATIO_CTL; /*!< 0x00000020 Ratio control */ member
/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/include/
Dcy_evtgen.h725 return (((_FLD2VAL(EVTGEN_RATIO_CTL_VALID, base->RATIO_CTL)) != 0UL) ? true : false); in Cy_EvtGen_GetRatioStatus()